IP Library › Granted Patent US 11,227,920
Granted Patent B2
US 11,227,920 · App. 16/618,831 · Granted Jan 18, 2022

Semiconductor device, and method of manufacturing the semiconductor device

Inventor: Shunpei Yamazaki (Tokyo, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/24H01L27/11582
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Quick Facts
Patent No.
US 11,227,920
App. No.
16/618,831
Granted
Jan 18, 2022
Kind
B2
Abstract

A semiconductor device having a large storage capacity per unit area is provided. The semiconductor device includes a memory transistor. The memory transistor includes a conductor including an opening, a first insulator provided in contact with an inner side of the opening, a second insulator provided in contact with an inner side of the first insulator, a third insulator provided in contact with an inner side of the second insulator, a first oxide provided in contact with an inner side of the third insulator, and a second oxide provided in contact with an inner side of the first oxide. An energy gap of the second oxide is narrower than an energy gap of the first oxide.

Claims (81)

1. A semiconductor device comprising a memory transistor,

the memory transistor comprising:

a conductor comprising an opening;

a first insulator provided in contact with an inner side of the opening;

a second insulator provided in contact with an inner side of the first insulator;

a third insulator provided in contact with an inner side of the second insulator;

a first oxide provided in contact with an inner side of the third insulator; and

a second oxide provided in contact with an inner side of the first oxide,

wherein each of the first oxide and the second oxide comprises In, an element M, and Zn,

wherein the element M is at least one of Al, Ga, Y, and Sn,

wherein the element M for the first oxide and the element M of the second oxide are the same, and

wherein an energy gap of the second oxide is narrower than an energy gap of the first oxide.

2. The semiconductor device according to claim 1 ,

wherein an atomic ratio of In in the second oxide is greater than an atomic ratio of the element Min the second oxide.

3. The semiconductor device according to claim 1 ,

wherein an atomic ratio of the element M to In in the first oxide is greater than an atomic ratio of the element M to In in the second oxide.

4. The semiconductor device according to claim 1 ,

wherein the semiconductor device further comprises a base,

wherein the semiconductor device comprises a plurality of memory transistors over the base, and

wherein the plurality of memory transistors are stacked in a direction perpendicular to one surface included in the base.

5. The semiconductor device according to claim 1 ,

wherein the first insulator is an oxide comprising any one of silicon, aluminum, and hafnium.

6. The semiconductor device according to claim 1 ,

wherein the third insulator is an oxide comprising any one of silicon, aluminum, and hafnium.

7. The semiconductor device according to claim 1 ,

wherein the third insulator is thinner than the first insulator.

8. A semiconductor device comprising a memory transistor,

the memory transistor comprising:

a conductor comprising an opening;

a first insulator provided in contact with an inner side of the opening;

a second insulator provided in contact with an inner side of the first insulator;

a third insulator provided in contact with an inner side of the second insulator;

a first oxide provided in contact with an inner side of the third insulator;

a second oxide provided in contact with an inner side of the first oxide; and

a third oxide provided in contact with an inner side of the second oxide,

wherein each of the first oxide and the second oxide comprises In, an element M, and Zn,

wherein the element M is at least one of Al, Ga, Y, and Sn,

wherein the element M for the first oxide and the element M of the second oxide are the same,

wherein an energy gap of the second oxide is narrower than an energy gap of the first oxide, and

wherein an energy gap of the second oxide is narrower than an energy gap of the third oxide.

9. The semiconductor device according to claim 8 ,

wherein the memory transistor further comprises a fourth insulator, and

wherein the fourth insulator is provided in contact with an inner side of the third oxide.

10. The semiconductor device according to claim 8 ,

wherein an atomic ratio of In in the second oxide is greater than an atomic ratio of the element M in the second oxide.

11. The semiconductor device according to claim 8 ,

wherein an atomic ratio of the element M to In in the first oxide is greater than an atomic ratio of the element M to In in the second oxide.

12. The semiconductor device according to claim 8 ,

wherein the semiconductor device further comprises a base,

wherein the semiconductor device comprises a plurality of memory transistors over the base, and

wherein the plurality of memory transistors are stacked in a direction perpendicular to one surface included in the base.

13. The semiconductor device according to claim 8 ,

wherein the first insulator is an oxide comprising any one of silicon, aluminum, and hafnium.

14. The semiconductor device according to claim 8 ,

wherein the third insulator is an oxide comprising any one of silicon, aluminum, and hafnium.

15. The semiconductor device according to claim 8 ,

wherein the third insulator is thinner than the first insulator.

16. A semiconductor device comprising a memory transistor,

the memory transistor comprising:

a conductor comprising an opening;

a first insulator provided in contact with an inner side of the opening;

a second insulator provided in contact with an inner side of the first insulator;

a third insulator provided in contact with an inner side of the second insulator;

a first oxide provided in contact with an inner side of the third insulator; and

a second oxide provided in contact with an inner side of the first oxide,

wherein each of the first oxide and the second oxide comprises In, Ga, and Zn, and

wherein an atomic ratio of In in the second oxide is greater than an atomic ratio of Ga in the second oxide.

17. The semiconductor device according to claim 16 ,

wherein an atomic ratio of Ga in the first oxide is greater than an atomic ratio of In in the first oxide.

18. The semiconductor device according to claim 16 ,

wherein an atomic ratio of Ga to In in the first oxide is greater than an atomic ratio of Ga to In in the second oxide.

19. The semiconductor device according to claim 16 ,

wherein the third insulator is thinner than the first insulator.

20. The semiconductor device according to claim 16 ,

wherein the semiconductor device further comprises a base,

wherein the semiconductor device comprises a plurality of memory transistors over the base, and

wherein the plurality of memory transistors are stacked in a direction perpendicular to one surface included in the base.

21. The semiconductor device according to claim 16 ,

wherein the first insulator is an oxide comprising any one of silicon, aluminum, and hafnium.

22. The semiconductor device according to claim 16 ,

wherein the third insulator is an oxide comprising any one of silicon, aluminum, and hafnium.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2019
From: YAMAZAKI, SHUNPEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 051159/0378 →
Priority Claims (1)
JP JP2017-111144 · Jun 5, 2017 · national
Continuity (1)
Related Publication 20210104608A1 · Apr 8, 2021
Cited By (4)
US 12,200,934 US 12,604,457 US 12,727,147 US 12,745,391