IP Library › Granted Patent US 11,239,173
Granted Patent B2
US 11,239,173 · App. 16/446,796 · Granted Feb 1, 2022

Structure and formation method of chip package with fan-out feature

Inventors: Po-Hao Tsai (Zhongli, TW); Meng-Liang Lin (Hsinchu, TW); Po-Yao Chuang (Hsin-Chu, TW); Techi Wong (Zhubei, TW); Shin-Puu Jeng (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L23/5389H01L21/4857H01L21/568H01L23/3128H01L25/18H01L25/50
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Quick Facts
Patent No.
US 11,239,173
App. No.
16/446,796
Granted
Feb 1, 2022
Kind
B2
Abstract

A package structure and a formation method of a package structure are provided. The method includes forming a redistribution structure over a carrier substrate and disposing a semiconductor die over the redistribution structure. The method also includes stacking an interposer substrate over the redistribution structure. The interposer substrate extends across edges of the semiconductor die. The method further includes disposing one or more device elements over the interposer substrate. In addition, the method includes forming a protective layer to surround the semiconductor die.

Claims (37)

1. A method for forming a package structure, comprising:

forming a first redistribution structure over a carrier substrate;

disposing a first semiconductor die over an interposer substrate,

subsequently stacking the interposer substrate over the first redistribution structure and the carrier substrate, wherein the interposer substrate extends across edges of the first semiconductor die, the first semiconductor die is disposed over the interposer substrate prior to stacking the interposer substrate over the first redistribution structure, and the first redistribution structure and the carrier substrate are positioned at a same side of the first semiconductor die;

disposing at least one device element over the interposer substrate;

disposing a second redistribution structure over the device element;

forming a first protective layer to surround the first semiconductor die connecting the first redistribution structure and the interposer substrate; and

forming a second protective layer to surround the device element, wherein the device element and the second redistribution structure are separated by the second protective layer.

2. The method for forming a package structure as claimed in claim 1 , further comprising stacking a package module over the first redistribution structure, wherein the package module extends across edges of the interposer substrate.

3. The method for forming a package structure as claimed in claim 2 , wherein the first protective layer is formed before the package module is stacked.

4. The method for forming a package structure as claimed in claim 1 , wherein the interposer substrate contains more filler than the first redistribution structure.

5. The method for forming a package structure as claimed in claim 1 , further comprising stacking a second semiconductor die over the first redistribution structure such that the first semiconductor die is between the first redistribution structure and the second semiconductor die.

6. The method for forming a package structure as claimed in claim 1 , wherein the interposer substrate is directly below a package module.

7. The method for forming a package structure as claimed in claim 1 , further comprising stacking a second semiconductor die over the interposer substrate such that the interposer substrate is between the first semiconductor die and the second semiconductor die.

8. The method for forming a package structure as claimed in claim 7 , further comprising:

forming a second redistribution structure over the second protective layer and the second semiconductor die.

9. The method for forming a package structure as claimed in claim 8 , further comprising stacking a package module over the second redistribution structure.

10. A method for forming a package structure, comprising:

stacking a first semiconductor die over an interposer substrate, wherein a first conductive structure directly connects to the interposer substrate and the first semiconductor die;

forming a first protective layer to surround the first semiconductor die over the interposer substrate;

bonding the interposer substrate to a first redistribution structure disposed on a carrier substrate with the first protective layer, wherein the interposer substrate is wider than the first semiconductor die;

subsequently stacking a second semiconductor die and a device element over the interposer substrate on an opposite side of the first semiconductor die, wherein a second conductive structure directly connects to the interposer substrate and the second semiconductor die; and

forming a second protective layer to surround the second semiconductor die and the device element.

11. The method for forming a package structure as claimed in claim 10 , further comprising bonding a package module over the first redistribution structure, wherein the package module extends across edges of the interposer substrate.

12. The method for forming a package structure as claimed in claim 11 , wherein the first protective layer is formed before the package module is bonded over the first redistribution structure.

13. A method for forming a package structure, comprising:

forming a first redistribution structure over a carrier substrate;

disposing a first semiconductor die and at least one conductive bump structure on a first side of an interposer substrate;

subsequently stacking the interposer substrate over the first redistribution structure and the carrier substrate, wherein the at least one conductive bump structure directly connects the interposer substrate and the first redistribution structure;

disposing a second semiconductor die and at least one conductive pillar structure directly on a second side of the interposer substrate, wherein a portion of the first semiconductor die overlaps the second semiconductor die in a normal direction of the carrier substrate, and the first redistribution structure is between the second semiconductor die and the carrier substrate.

14. The method for forming a package structure as claimed in claim 13 , further comprising forming a first protective layer surrounding the first semiconductor die between the first redistribution structure and the interposer substrate.

15. The method for forming a package structure as claimed in claim 14 , further comprising forming a second protective layer surrounding the second semiconductor die.

16. The method for forming a package structure as claimed in claim 14 , wherein the first protective layer is formed prior to stacking the interposer substrate over the first redistribution structure and the carrier substrate.

17. The method for forming a package structure as claimed in claim 13 , further comprising forming a device element on the second side of the interposer substrate adjacent to the second semiconductor die.

18. The method for forming a package structure as claimed in claim 13 , further comprising forming a package module on the second protective layer, wherein the package module is wider than the first semiconductor die.

19. The method for forming a package structure as claimed in claim 13 , further comprising forming a second redistribution structure over the interposer substrate, wherein the second redistribution structure and the interposer substrate are disposed on opposite sides of the second semiconductor die, and a portion of the second protective layer extends between the second semiconductor die and the second redistribution structure in the normal direction of the carrier substrate.

20. The method for forming a package structure as claimed in claim 13 , wherein the interposer substrate is wider than the first semiconductor die.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2019
From: TSAI, PO-HAO; LIN, MENG-LIANG; CHUANG, PO-YAO; WONG, TECHI; JENG, SHIN-PUU
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 049533/0623 →
Continuity (2)
Provisional Application 62825072 · Mar 28, 2019
Related Publication 20200312773A1 · Oct 1, 2020
Cited By (1)
US 12,628,711