Semiconductor memory devices and methods of fabricating the same
Disclosed are semiconductor memory devices and methods of fabricating the same. The semiconductor memory devices may include a capacitor including first and second electrodes and a dielectric layer. The dielectric layer may include a zirconium aluminum oxide layer including a first zirconium region adjacent to the first electrode, a first aluminum region, a second aluminum region adjacent to the second electrode, and a second zirconium region between the first and second aluminum regions. The first and second zirconium regions may include zirconium and oxygen and may be devoid of aluminum. The first and second aluminum regions may include aluminum and oxygen and may be devoid of zirconium. The first aluminum region and the first zirconium region may be spaced apart by a first distance, and the first aluminum region and the second zirconium region may be spaced apart by a second distance shorter than the first distance.
1. A method of fabricating a semiconductor memory device, the method comprising:
depositing a first zirconium oxide layer on a substrate;
depositing a first aluminum oxide layer on the first zirconium oxide layer;
depositing a second zirconium oxide layer on the first aluminum oxide layer;
performing a first annealing process that causes aluminum atoms in the first aluminum oxide layer to diffuse into the first zirconium oxide layer and the second zirconium oxide layer, thereby forming a preliminary dielectric layer that includes a first diffusion region and a second diffusion region;
depositing a third zirconium oxide layer on the preliminary dielectric layer; and
depositing a second aluminum oxide layer on the third zirconium oxide layer.
2. The method of claim 1 , after depositing the second aluminum oxide layer, further comprising performing a second annealing process that causes aluminum atoms in the second aluminum oxide layer to diffuse into the third zirconium oxide layer, thereby forming a third diffusion region.
3. The method of claim 1 , before depositing the second zirconium oxide layer, further comprising performing a second annealing process.
4. The method of claim 1 , wherein:
the first zirconium oxide layer is deposited to have a first thickness;
the second zirconium oxide layer is deposited to have a second thickness;
the third zirconium oxide layer is deposited to have a third thickness; and
the first thickness is greater than the second thickness and the third thickness.
5. The method of claim 4 , wherein the first thickness is equal to a sum of the second thickness and the third thickness.
6. The method of claim 1 , before depositing the first zirconium oxide layer on the substrate, further comprising depositing a hafnium oxide layer on the substrate.
7. A method of fabricating a semiconductor memory device, the method comprising:
depositing a first A-metal oxide layer comprising an A-metallic element on a substrate;
depositing a first B-metal oxide layer comprising a B-metallic element on the first A-metal oxide layer;
depositing a second A-metal oxide layer comprising the A-metallic element on the first B-metal oxide layer;
performing a first annealing process that causes the B-metallic element in the first B-metal oxide layer to diffuse into the first A-metal oxide layer and the second A-metal oxide layer, thereby forming a preliminary dielectric layer that includes a first diffusion region and a second diffusion region;
depositing a third A-metal oxide layer comprising the A-metallic element on the preliminary dielectric layer; and
depositing a second B-metal oxide layer comprising the B-metallic element on the third A-metal oxide layer.
8. The method of claim 7 , after depositing the second B-metal oxide layer, further comprising performing a second annealing process that causes the B-metallic element in the second B-metal oxide layer to diffuse into the third A-metal oxide layer, thereby forming a third diffusion region.
9. The method of claim 7 , before depositing the second A-metal oxide layer, further comprising performing a second annealing process.
10. The method of claim 7 , wherein:
the first A-metal oxide layer is deposited to have a first thickness;
the second A-metal oxide layer is deposited to have a second thickness;
the third A-metal oxide layer is deposited to have a third thickness; and
the first thickness is greater than the second thickness and the third thickness.
11. The method of claim 10 , wherein the first thickness is equal to as a sum of the second thickness and the third thickness.
12. The method of claim 7 , before depositing the first A-metal oxide layer on the substrate, further comprising depositing a C-metal oxide layer on the substrate,
wherein the C-metal oxide layer is devoid of the A-metallic element and the B-metallic element.
13. A method of fabricating a capacitor of a semiconductor memory device, the method comprising:
forming a first electrode; and
forming a dielectric layer and a second electrode on the first electrode,
wherein the dielectric layer is between the first electrode and the second electrode and comprises:
a first A-metal oxide region comprising an A-metallic element;
a second A-metal oxide region comprising the A-metallic element on the first A-metal oxide region;
a first B-metal oxide region comprising a B-metallic element between the first A-metal oxide region and the second A-metal oxide region; and
a second B-metal oxide region comprising the B-metallic element between the second A-metal oxide region and the second electrode,
wherein each of the first A-metal oxide region and the second A-metal oxide region is devoid of the B-metallic element,
wherein each of the first B-metal oxide region and the second B-metal oxide region is devoid of the A-metallic element, and
wherein the first A-metal oxide region and the first B-metal oxide region are spaced apart from each other by a first distance, and the first B-metal oxide region and the second A-metal oxide region are spaced apart from each other by a second distance that is shorter than the first distance.
14. The method of claim 13 , wherein the first B-metal oxide region has a first B-metallic element concentration, and the second B-metal oxide region has a second B-metallic element concentration that is greater than the first B-metallic element concentration.
15. The method of claim 13 , wherein the dielectric layer further comprises:
a first diffusion region between the first A-metal oxide region and the first B-metal oxide region; and
a second diffusion region between the first B-metal oxide region and the second A-metal oxide region,
wherein each of the first and second diffusion regions comprises the A-metallic element, the B-metallic element, and oxygen.
16. The method of claim 15 , wherein the first electrode and the second electrode are spaced apart from each other in a first direction, and
wherein the first diffusion region has a first thickness in the first direction, the second diffusion region has a second thickness in the first direction, and the first thickness is greater than the second thickness.
17. The method of claim 15 , wherein forming the dielectric layer comprises:
sequentially depositing a first A-metal oxide layer comprising the A-metallic element, a first B-metal oxide layer comprising the B-metallic element, and a second A-metal oxide layer comprising the A-metallic element, wherein the first B-metal oxide layer contacts both the first A-metal oxide layer and the second A-metal oxide layer; and then
performing an annealing process causing the B-metallic element of the first B-metal oxide layer to diffuse into the first A-metal oxide layer and the second A-metal oxide layer, thereby forming the first diffusion region and the second diffusion region.
18. The method of claim 15 , wherein the dielectric layer further comprises a third diffusion region that is between the second A-metal oxide region and the second B-metal oxide region and comprises the A-metallic element, the B-metallic element, and oxygen.
19. The method of claim 18 , wherein forming the dielectric layer comprises:
forming a preliminary dielectric layer by operations comprising:
sequentially depositing a first A-metal oxide layer comprising the A-metallic element, a first B-metal oxide layer comprising the B-metallic element, and a second A-metal oxide layer comprising the A-metallic element, wherein the first B-metal oxide layer contacts both the first A-metal oxide layer and the second A-metal oxide layer; and then
performing a first annealing process causing the B-metallic element of the first B-metal oxide layer to diffuse into the first A-metal oxide layer and the second A-metal oxide layer, thereby forming the first diffusion region and the second diffusion region;
sequentially depositing a third A-metal oxide layer comprising the A-metallic element and a second B-metal oxide layer comprising the B-metallic element on the preliminary dielectric layer; and
converting the third A-metal oxide layer and the second B-metal oxide layer into the third diffusion region and the second B-metal oxide region, respectively.
20. The method of claim 18 , wherein forming the dielectric layer comprises:
sequentially depositing a first A-metal oxide layer comprising the A-metallic element and a first B-metal oxide layer comprising the B-metallic element;
after sequentially depositing the first A-metal oxide layer and the first B-metal oxide layer, performing a first annealing process causing the B-metallic element of the first B-metal oxide layer to diffuse into the first A-metal oxide layer, thereby forming the first diffusion region;
sequentially depositing a second A-metal oxide layer comprising the A-metallic element and a second B-metal oxide layer comprising the B-metallic element on the first B-metal oxide region; and then
performing a second annealing process causing the B-metallic element of the first B-metal oxide region to diffuse into the second A-metal oxide layer, thereby forming the second diffusion region and causing the B-metallic element of the second B-metal oxide layer to diffuse into the second A-metal oxide layer, thereby forming the third diffusion region.