Variable resistance memory device
A variable resistance memory device includes a first conductive line extending in a first direction, a second conductive line extending in a second direction, the second direction intersecting the first direction on the first conductive line, a fixed resistance layer between the first conductive line and the second conductive line, and a variable resistance layer between the first conductive line and the second conductive line, wherein the fixed resistance layer and the variable resistance layer are electrically connected in parallel to each other between the first conductive line and the second conductive line.
1. A variable resistance memory device comprising:
a first conductive line extending in a first direction;
a second conductive line extending in a second direction, the second direction intersecting the first direction on the first conductive line;
a fixed resistance layer between the first conductive line and the second conductive line; and
a variable resistance layer between the first conductive line and the second conductive line,
wherein the fixed resistance layer and the variable resistance layer are electrically connected in parallel to each other between the first conductive line and the second conductive line, and
wherein
the fixed resistance layer is in a region where the first conductive line and the second conductive line intersect each other,
the variable resistance layer is on a side surface of the fixed resistance layer, and
the fixed resistance layer extends in the second direction along the second conductive line.
2. The variable resistance memory device of claim 1 , wherein the variable resistance layer extends on one side surface of the second conductive line immediately adjacent to the side surface of the fixed resistance layer and is electrically connected to the second conductive line.
3. The variable resistance memory device of claim 2 , wherein the variable resistance layer extends along an upper surface and another side surface of the second conductive line.
4. The variable resistance memory device of claim 1 , wherein a width of the fixed resistance layer in the first direction is less than a width of the second conductive line in the first direction.
5. The variable resistance memory device of claim 1 , wherein
the variable resistance layer is provided in a region where the first conductive line and the second conductive line intersect each other, and
the fixed resistance layer is provided on one side surface of the variable resistance layer.
6. The variable resistance memory device of claim 1 , further comprising:
a first electrode pattern between the first conductive line and the fixed resistance layer; and
a second electrode pattern between the second conductive line and the fixed resistance layer.
7. The variable resistance memory device of claim 6 , wherein the variable resistance layer extends in a third direction perpendicular to the first and second directions and covers side surfaces of the first electrode pattern and the second electrode pattern.
8. The variable resistance memory device of claim 7 , wherein the variable resistance layer exposes an upper surface of the second electrode pattern.
9. The variable resistance memory device of claim 6 , wherein each of the first electrode pattern and the second electrode pattern has a rectangular column shape extending in a third direction perpendicular to the first and second directions.
10. The variable resistance memory device of claim 6 , wherein each of the first electrode pattern and the second electrode pattern has a cylindrical shape extending in a third direction perpendicular to the first and second directions.
11. The variable resistance memory device of claim 1 , further comprising:
an intermediate electrode layer between the second conductive line and the fixed resistance layer; and
a selection device layer between the second conductive line and the intermediate electrode layer,
wherein the selection device layer is configured to selectively block a current based on a voltage applied to the selection device layer.
12. The variable resistance memory device of claim 11 , wherein the variable resistance layer exposes side surfaces of the selection device layer.
13. A variable resistance memory device comprising:
first conductive lines extending in a first direction and arranged in a second direction that intersects with the first direction;
second conductive lines extending in the second direction on the first conductive lines and arranged in the first direction;
fixed resistance layers provided between the first conductive lines and the second conductive lines; and
variable resistance layers electrically connected in parallel to the fixed resistance layers,
wherein each of the fixed resistance layers is electrically connected to one of the first conductive lines immediately adjacent thereto and one of the second conductive lines immediately adjacent thereto,
wherein each of the variable resistance layers is electrically connected to one of the first conductive lines immediately adjacent thereto and one of the second conductive lines immediately adjacent thereto, and
wherein
each of the fixed resistance layers is in a region where a respective one of the first conductive lines and a respective one of the second conductive lines intersect each other,
each of the variable resistance layers is on a side surface of a respective one of the fixed resistance layers, and
each of the fixed resistance layers extends in the second direction along a respective one of the second conductive lines.
14. The variable resistance memory device of claim 13 , wherein
the variable resistance layers are respectively at regions where the first conductive lines and the second conductive lines intersect each other, and
each of the fixed resistance layers is on a side surface of the variable resistance layer immediately adjacent thereto among the variable resistance layers, and extends on a side surface of the respective one of the second conductive lines.
15. A variable resistance memory device comprising:
first conductive line layers and second conductive line layers that are alternately stacked;
fixed resistance layers between the first conductive line layers and the second conductive line layers; and
variable resistance layers between the first conductive line layers,
wherein each of the variable resistance layers extends along side surfaces of a pair of fixed resistance layers spaced apart from each other with one of the second conductive line layers therebetween among the fixed resistance layers,
wherein each of the first conductive line layers includes first conductive lines extending in a first direction and arranged in a second direction that intersects with the first direction, and
wherein each of the second conductive line layers includes second conductive lines extending in the second direction and arranged in the first direction.
16. The variable resistance memory device of claim 15 , wherein each of the variable resistance layers is electrically connected to a pair of first conductive lines spaced apart from each other with each of the variable resistance layers therebetween among the first conductive lines and the second conductive line between the pair of first conductive lines among the second conductive lines.
17. The variable resistance memory device of claim 16 , wherein each of the variable resistance layers includes a first part electrically connected in parallel with one of the pair of fixed resistance layers and a second part electrically connected in parallel with the other one of the pair of fixed resistance layers.
18. A variable resistance memory device comprising:
a first conductive line extending in a first direction;
a second conductive line extending in a second direction, the second direction intersecting the first direction on the first conductive line;
a parallel resistance layer electrically connecting the first and second conductive lines, the parallel resistance layer including a fixed resistance layer and a variable resistance layer electrically connected in parallel, the variable resistance layer being one of a phase change material or a layer configured to have mobile oxygen vacancies, and
wherein
the fixed resistance layer is in a region where the first conductive line and the second conductive line intersect each other,
the variable resistance layer is on a side surface of the fixed resistance layer, and
the fixed resistance layer extends in the second direction along the second conductive line.
19. The variable resistance memory device of claim 18 , wherein the layer configured to have mobile oxygen vacancies includes
a dielectric layer, and
one of an oxide layer or a nitride layer.
20. The variable resistance memory device of claim 18 , further comprising:
a first electrode pattern between the first conductive line and the fixed resistance layer; and
a second electrode pattern between the second conductive line and the fixed resistance layer.
21. The variable resistance memory device of claim 18 , further comprising:
a first insulating layer coplanar with the first conductive line, the first insulating layer defining a trench, and the first conductive line being in the trench.
22. The variable resistance memory device of claim 21 , further comprising:
a first electrode pattern between the first conductive line and the fixed resistance layer;
a second electrode pattern between the second conductive line and the fixed resistance layer; and
a second insulating layer on the first insulating layer, the second insulating layer contacting opposite side surfaces of the first electrode pattern in the second direction.
23. A variable resistance memory device comprising:
a first conductive line extending in a first direction;
a second conductive line extending in a second direction, the second direction intersecting the first direction on the first conductive line;
a variable resistance layer provided in a region where the first conductive line and the second conductive line intersect each other; and
a fixed resistance layer provided on a side of the variable resistance layer,
wherein the fixed resistance layer and the variable resistance layer are electrically connected in parallel to each other between the first conductive line and the second conductive line, and
wherein the variable resistance layer extends in the second direction along the second conductive line.