Wrap-around bottom contact for bottom source/drain
A method of forming a vertical transport fin field effect transistor device is provided. The method includes replacing a portion of a sacrificial exclusion layer between one or more vertical fins and a substrate with a temporary inner spacer. The method further includes removing a portion of a fin layer and the sacrificial exclusion layer between the one or more vertical fins and the substrate, and forming a bottom source/drain on the temporary inner spacer and between the one or more vertical fins and the substrate. The method further includes replacing a portion of the bottom source/drain with a temporary gap filler, and replacing the temporary gap filler and temporary inner spacer with a wrap-around source/drain contact having an L-shaped cross-section.
1. A vertical transport fin field effect transistor device, comprising:
a wrap-around source/drain contact on a substrate;
a bottom source/drain on the substrate and wrap-around source/drain contact;
a vertical fin on the bottom source/drain;
a gate structure on the vertical fin;
a top source/drain on the vertical fin; and
a bottom source/drain contact on and in electrical contact with the wrap-around source/drain and bottom source/drain, wherein the wrap-around source/drain reduces electrical resistance between the bottom source/drain contact and bottom source/drain.
2. The device of claim 1 , wherein the wrap-around source/drain contact is on four sides and below an edge portion of the bottom source/drain that produces an L shape.
3. The device of claim 2 , wherein the wrap-around source/drain contact is made of a conductive metal selected fromthe group consisting of tungsten (W), aluminum (Al), copper (Cu), cobalt (Co), nickel (Ni), titanium (Ti), ruthenium (Ru), molybdenum (Mo), and combinations thereof.
4. The device of claim 3 , wherein a metal suicide between the wrap-around source/drain contact and the bottom source/drain is not degraded.
5. The device of claim 2 , further comprising a bottom spacer layer between the gate structure and the bottom source/drain.
6. The device of claim 5 , further comprising a top spacer layer between the gate structure and the top source/drain.
7. The device of claim 6 , further comprising a conductive gate contact on and in electrical contact with a conductive gate layer of the gate structure, wherein the conductive gate contact is not over the bottom source/drain.
8. A vertical transport fin field effect transistor device, comprising:
a wrap-around source/drain contact on a substrate;
a bottom source/drain on the substrate and wrap-around source/drain contact;
a vertical fin on the bottom source/drain;
a top spacer layer on the bottom source/drain and vertical fin;
a gate dielectric layer on the bottom spacer layer and vertical fin;
a conductive gate layer on the gate dielectric layer;
a top source/drain on the vertical fin; and
a bottom source/drain contact on and in electrical contact with the wrap-around source/drain and bottom source/drain, wherein the wrap-around source/drain reduces electrical resistance between the bottom source/drain contact and bottom source/drain.
9. The device of claim 6 , wherein a cross-section of the wrap-around source/drain contact is L-shaped.
10. The device of claim 9 , wherein the wrap-around source/drain contact is made of a conductive metal selected from the group consisting of tungsten (W), aluminum (Al), copper (Cu), cobalt (Co), nickel (Ni), titanium (Ti), ruthenium (Ru), molybdenum (Mo), and combinations thereof.
11. The device of claim 10 , wherein a metal silicide between the wrap-around source/drain contact and the bottom source/drain is not degraded.
12. The device of claim 8 , further comprising a top spacer layer between the conductive gate layer and the top source/drain.
13. The device of claim 12 , further comprising a conductive gate contact on and in electrical contact with the conductive gate layer, and a top source/drain contact on the top source/drain.