Method for manufacturing backside-illuminated CMOS image sensor structure

1. A method for manufacturing a backside-illuminated CMOS image sensor structure, comprising:

Step 01 : providing a silicon substrate which has been subjected to a front side processing and a back thinning;

Step 02 : forming grid-shaped deep trenches on the back of the silicon substrate;

Step 03 : forming an insulating layer on an inner wall surface of the deep trenches to form a grid-shaped deep trenches isolation structure;

Step 04 : forming a diffusion barrier layer on a surface of the insulating layer;

Step 05 : filling metal in the deep trenches to form a grid-shaped composite structure in which a Metal grid is combined with the deep trenches isolation structure;

Step 06 : etching the back of the silicon substrate to form cavities in grids of the grid-shaped deep trenches isolation structure.

2. The method of claim 1 , wherein in step 01 , the front side processing comprises forming a photodiode array on the front side of the silicon substrate; in step 02 , the grid-shaped deep trenches formed is located between the photodiodes in the photodiode array.

3. The method of claim 2 , wherein a bottom surface of the deep trenches is up-down staggered with a top surface of the photodiode.

4. The method of claim 1 , wherein further comprising:

Step 07 : coating an anti-reflection layer on the back of the silicon substrate;

Step 08 : performing a color filter material filling in the cavities to form a color filter.

5. The method of claim 4 , wherein in step 06 , the back of the silicon substrate is wet etched using the grid-shaped deep trenches isolation structure as a mask.

6. The method of claim 4 , wherein in step 07 , the anti-reflection layer is blanket deposited on the back of the silicon substrate by CVD or ALD, and the back of the silicon substrate, a surface of the deep trenches isolation structure and a sidewall of the deep trenches isolation structure are all covered by the anti-reflection layer; in step 08 , a photoresist with a dye is filled in the cavities as the color filter material by spin coating.

7. The method of claim 1 , wherein in step 02 , the grid-shaped deep trenches are formed on the back of the silicon substrate by a lithography and an etch processes, and a depth-to-width ratio after the etch process is at least 10:1.

8. The method of claim 7 , wherein further comprising removing a photoresist on the silicon substrate and cleaning the silicon substrate after the step 02 .

9. The method of claim 1 , wherein in step 03 , the insulating layer is deposited on the inner wall surface of the deep trenches by CVD or ALD; in step 04 , the diffusion barrier layer is formed on the surface of the insulating layer by CVD, PVD, ALD, or sputtering.

10. The method of claim 1 , wherein the step 05 comprises, filling the metal in the deep trenches by CVD or PVD, then performing a surface planarization process by CMP, removing the excess metal, the diffusion barrier layer material, and the insulating layer material on the back of the silicon substrate.