Semiconductor device and method for manufacturing same
A semiconductor device includes a redistribution layer, a bump bonded to a first surface of the redistribution layer, and a chip bonded to a second surface of the redistribution layer. The redistribution layer includes an insulating layer, a conductive member connecting the bump to the chip and being provided inside the insulating layer, a bonding electrode connected between the conductive member and the bump, and a conductive layer provided between the insulating layer and the conductive member and between the bonding electrode and the conductive member. A resistivity of the conductive member is lower than a resistivity of the conductive layer.
1. A semiconductor device, comprising:
a redistribution layer;
a bump bonded to a first surface of the redistribution layer; and
a chip bonded to a second surface of the redistribution layer, the second surface being opposite side of the first surface,
the redistribution layer including
an insulating layer,
a conductive member connecting the bump to the chip and being provided inside the insulating layer,
a bonding electrode connected between the conductive member and the bump, the bonding electrode being provided inside the insulating layer, and
a conductive layer provided between the insulating layer and the conductive member and between the bonding electrode and the conductive member,
the conductive member including:
a first via connected to the bump,
a second via connected to the chip, and
an interconnect connected between the first via and the second via;
the conductive layer being disposed at least on a lower surface of the first via, on a side surface of the first via, and on a lower surface of the interconnect,
the first via being connected to the bonding electrode via the conductive layer,
a structure body and the bonding electrode coinciding with each other when viewed from the first surface side, the structure body formed of the first via and a portion of the conductive layer disposed on the side surface of the first via,
no step being provided at a boundary between the conductive layer and the bonding electrode, the boundary between the conductive layer and the bonding electrode being located inside the insulating layer, and
a resistivity of the conductive member being lower than a resistivity of the conductive layer.
2. The device according to claim 1 , wherein
the insulating layer includes an organic material,
the conductive member includes copper,
the conductive layer includes titanium, and
the bonding electrode includes nickel.
3. The device according to claim 1 , wherein
the conductive layer is disposed also on a lower surface of the second via and on a side surface of the second via, and
the second via is connected to the interconnect via the conductive layer.
4. The device according to claim 1 , further comprising:
another chip provided on the chip and connected to the conductive member via the chip; and
a resin member covering the chip and the other chip and being provided on the second surface.
5. The device according to claim 1 , further comprising a control chip bonded to the first surface and connected to the conductive member.