IP Library Granted Patent US 11,289,306
Granted Patent B2
US 11,289,306 · App. 15/682,369 · Granted Mar 29, 2022

Ion beam etching utilizing cryogenic wafer temperatures

Inventors: Thorsten Lill (Santa Clara, CA); Ivan L. Berry, III (San Jose, CA); Anthony Ricci (Redwood City, CA)
Assignee: Lam Research Corporation
H01J37/321H01J37/32366H01J37/32422H01J37/32724H01L27/222H01L43/08
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Quick Facts
Patent No.
US 11,289,306
App. No.
15/682,369
Granted
Mar 29, 2022
Kind
B2
Abstract

The embodiments herein relate to methods and apparatus for etching features in semiconductor substrates. In a number of cases, the features may be etched while forming a spin-torque-transfer random access memory (STT-RAM) device. In various embodiments, the substrate may be cooled to a low temperature via a cooled substrate support during particular processing steps. The cooled substrate support may have beneficial impacts in terms of reducing the degree of diffusion-related damage in a resulting device. Further, the use of a non-cooled substrate support during certain other processing steps can likewise have beneficial impacts in terms of reducing diffusion-related damage, depending on the particular step. In some implementations, the cooled substrate support may be used in a process to preferentially deposit a material (in some cases a reactant) on certain portions of the substrate.

Claims (26)

1. An ion beam etching apparatus for etching a substrate while forming a spin-torque-transfer random access memory (STT-RAM) device, the apparatus comprising:

a reaction chamber;

an ion beam generator;

a substrate support configured to heat and cool a substrate;

a controller configured with instructions to etch the substrate by:

receiving the substrate in the reaction chamber, the substrate comprising (i) a bottom electrode layer, (ii) an etch stop layer positioned over the bottom electrode layer, (iii) a first magnetic layer positioned over the etch stop layer, (iv) a tunneling dielectric layer positioned over the first magnetic layer, (v) a second magnetic layer positioned over the tunneling dielectric layer, and (vi) a patterned mask layer;

performing a first ion beam etching operation to define features on the substrate,

the first ion beam etching operation comprising exposing the substrate to ion beams to etch through at least the second magnetic layer, the tunneling dielectric layer, and the first magnetic layer;

performing a second ion beam etching operation to narrow a width of the features on the substrate,

the second ion beam etching operation comprising exposing sidewalls of the features to ion beams,

wherein the second ion beam etching operation is performed at a lower ion energy than the first ion beam etching operation, and

wherein the first and/or second ion beam etching operation result in formation of conductive material on exposed portions of the tunneling dielectric layer and/or in the tunneling dielectric layer; and

performing a conductive material mitigation operation to mitigate the conductive material formed on or in the tunneling dielectric layer during the first and/or second ion beam etching operation,

wherein mitigating the conductive material comprises either removing the conductive material or rendering the conductive material less conductive,

wherein the conductive material mitigation operation comprises exposing the substrate to ion beams,

wherein the conductive material mitigation operation is performed at a lower ion energy than the second ion beam etching operation, and

wherein during the conductive material mitigation operation, the substrate support is maintained at a temperature between about −70° C. and −10° C.

2. The apparatus of claim 1 , wherein the ion beam generator comprises an inductively coupled plasma source.

3. The apparatus of claim 2 , wherein the ion beam generator comprises an extraction electrode, a focus electrode, and a lower electrode, the extraction electrode being above the focus electrode, and the focus electrode being above the lower electrode, wherein the inductively coupled plasma source is positioned above the extraction electrode.

4. The apparatus of claim 3 , wherein the lower electrode and substrate are grounded during processing.

5. The apparatus of claim 3 , wherein the controller is configured with instructions to apply a negative bias on the lower electrode with respect to the substrate during processing.

6. The apparatus of claim 3 , further comprising a hollow cathode emitter electrode above the extraction electrode.

7. The apparatus of claim 3 , wherein the lower electrode comprises a plurality of apertures, the apparatus further comprising a plurality of reflectors positioned below the lower electrode, wherein the reflectors are oriented parallel to one another and at an angle (a) with respect to the lower electrode, and wherein the reflectors are sufficiently long to block a line of sight between the apertures in the lower electrode and the substrate support.

8. The apparatus of claim 1 , further comprising a source for delivering electrons proximate the substrate.

9. The apparatus of claim 1 , wherein the controller is configured with instructions to perform the first ion beam etching operation at an ion energy between about 100-10,000 eV, and to perform the second ion beam etching operation at an ion energy between about 50-300 eV, and to perform the conductive material mitigation operation at an ion energy between about 10-100 eV.

10. The apparatus of claim 1 , wherein the controller is configured with instructions to alter a relative orientation between the substrate and a direction in which the ion beams travel after the first ion beam etching operation and before the second ion beam etching operation.

Continuity (2)
Division 15054023 · Feb 25, 2016
Related Publication 20170372911A1 · Dec 28, 2017
Cited By (1)
US 12,302,760