Interconnected stacked circuits
The disclosure concerns an electronic device and methods of making an electronic device. The electronic device includes a circuit that is at least partially formed in an active region of a substrate. An electronic package is stacked on the substrate. A via extends through the circuit from the active region of the substrate to a surface of the substrate that is opposite the active region. At least one contacting element connects the via to the electronic package.
1. A device, comprising:
a first substrate having an active portion at a first side of the first substrate;
a first conductive via extending through the first substrate from the active portion to a second side of the first substrate opposite the first side;
an encapsulation layer at least partially surrounding the first substrate;
a conductive track on the second side of the first substrate and on a surface of the encapsulation layer; and
an electronic package on the first substrate, the electronic package including:
a second substrate;
a chip on the second substrate; and
a second conductive via extending through the second substrate and electrically coupling the chip to the conductive track.
2. The device of claim 1 , wherein the chip includes at least one memory circuit.
3. The device of claim 1 , wherein the encapsulation layer includes a plastic material containing additive particles which are activatable by a laser radiation.
4. An electronic device, comprising:
a first substrate having an active portion at a first side of the first substrate;
a first conductive via extending through the first substrate from the active portion to a second side of the first substrate opposite the first side;
an encapsulation layer at least partially surrounding the first substrate;
a conductive track on the second side of the first substrate and on a surface of the encapsulation layer;
a circuit at least partially formed in the active portion of the first substrate;
a via extending through said circuit from the active portion of the first substrate to the second side of the first substrate; and
a contacting element connecting said via to the electronic package; and
an electronic package stacked on the first substrate, the electronic package including:
a second substrate;
a chip on the second substrate; and
a second conductive via extending through the second substrate and electrically coupling the chip to the conductive track.
5. The electronic device of claim 4 , wherein said contacting element includes at least one of: a conductive track or a conductive pad.
6. The device of claim 4 , wherein the electronic package includes at least one solder bump.
7. The device of claim 4 , wherein said circuit is arranged on a support including an array of solder bumps.
8. The device of claim 4 , wherein said circuit is a microprocessor, a microcontroller, or an integrated system.
9. The device of claim 4 , wherein the electronic package includes at least one memory circuit.
10. The device of claim 4 , wherein said contacting element is arranged on the second side of the substrate.
11. The device of claim 4 , wherein the second side of the substrate is at least partially uncovered by the encapsulation block.
12. The device of claim 11 , wherein said contacting element is arranged on a surface of the encapsulation block and on the second side of the substrate.
13. The device of claim 11 , wherein the encapsulation block is formed of a plastic material containing additive particles which are activatable by a laser radiation.
14. The device of claim 13 , wherein said contacting element is attached or anchored to areas, at a surface of the encapsulation block, where the additive particles, contained in the plastic material forming the encapsulation block, have been previously activated by a laser structuring technology.
15. The device of claim 4 , wherein said contacting element is at least partially formed by at least one chemical deposition in a metal bath.
16. A method, comprising:
forming a first conductive via extending through a first substrate from an active portion at a first side of the first substrate to a second side of the first substrate opposite the first side;
forming an encapsulation layer at least partially surrounding the first substrate;
forming a conductive track on the second side of the first substrate and on a surface of the encapsulation layer; and
coupling an electronic package on the first substrate, the electronic package including a second substrate, a chip on the second substrate, and a second conductive via extending through the second substrate and electrically coupling the chip to the conductive track.
17. The method of claim 16 , wherein the second side of the first substrate is at least partially uncovered by the encapsulation layer.
18. The method of claim 17 , wherein the forming the contacting element includes forming the contacting element on a surface of the encapsulation layer.