Interconnected stacked circuits
The disclosure concerns an electronic device and methods of making an electronic device. The electronic device includes a circuit that is at least partially formed in an active region of a substrate. An electronic package is stacked on the substrate. A via extends through the circuit from the active region of the substrate to a surface of the substrate that is opposite the active region. At least one contacting element connects the via to the electronic package.
1. An electronic device, comprising:
a substrate;
a circuit at least partially formed in an active region of the substrate;
an encapsulation block partially encapsulating the circuit, wherein the encapsulation block is formed of a plastic material containing additive particles activatable by a laser radiation;
an electronic package stacked on the substrate;
a via extending through said circuit from the active region of the substrate to a surface of the substrate opposite the active region; and
a contacting element connecting said via to the electronic package.
2. The electronic device of claim 1 , wherein said contacting element includes at least one of: a conductive track or a conductive pad.
3. The device of claim 1 , wherein the electronic package includes at least one solder bump.
4. The device of claim 1 , wherein said circuit is arranged on a support including an array of solder bumps.
5. The device of claim 1 , wherein said circuit is a microprocessor, a microcontroller, or an integrated system.
6. The device of claim 1 , wherein the electronic package includes at least one memory circuit.
7. The device of claim 1 , wherein said contacting element is arranged on the surface of the substrate.
8. The device of claim 1 , wherein the encapsulation block is at least partially surrounding the substrate, the surface of the substrate being at least partially uncovered by the encapsulation block.
9. The device of claim 8 , wherein said contacting element is arranged on a surface of the encapsulation block and on the surface of the substrate.
10. The device of claim 1 , wherein said contacting element is attached or anchored to areas, at a surface of the encapsulation block, where the additive particles, contained in the plastic material forming the encapsulation block, have been previously activated by a laser structuring technology.
11. The device of claim 1 , wherein said contacting element is at least partially formed by at least one chemical deposition in a metal bath.
12. An electronic device, comprising:
a substrate;
a circuit at least partially formed in an active region of the substrate;
an encapsulation layer at least partially surrounding the substrate, wherein the encapsulation layer includes a plastic material containing additive particles activatable by a laser radiation;
an electronic package on the substrate;
a via extending through the circuit from the active region of the substrate to a surface of the substrate opposite the active region; and
a contacting element connecting the via to the electronic package.
13. The device of claim 12 , wherein the electronic package includes at least one memory circuit.
14. An electronic device, comprising:
a substrate;
a circuit in an active portion of the substrate;
an electronic package stacked on the substrate;
a plurality of conductive vias formed across the circuit and the substrate;
contacting elements having a plurality of first conductive pads coupled to the plurality of conductive vias and arranged on an encapsulation layer, wherein the encapsulation layer includes a plastic material containing additive particles activatable by a laser radiation; and
a plurality of solder bumps interposed between the plurality of first conductive pads and a plurality of second conductive pads, wherein the circuit is connected to the electronic package via the plurality of solder bumps.
15. The electronic device of 14 , wherein a first side of the circuit is partially exposed.
16. The electronic device of 14 , wherein the contacting elements further comprise a conductive track at least partially arranged on the encapsulation layer.
17. The electronic device of 14 , further comprising a wafer having a first surface and a second surface opposite the first surface, wherein the first surface comprises a ball grid array.
18. The electronic device of 14 , wherein the electronic package comprises a chip having a first dimension and a second dimension, the first and second dimensions of the chip smaller than a first dimension and a second dimension of the circuit.