Active matrix substrate and display device

1. An active matrix substrate having a display region that includes a plurality of pixel regions and a peripheral region positioned at a periphery of the display region, the active matrix substrate comprising:

a substrate;

a source driver that includes a plurality of gate bus lines and a plurality of source bus lines provided on the substrate, and a source driver that is disposed in the peripheral region and includes a plurality of output terminals;

a plurality of signal output lines respectively connected to each of the plurality of output terminals of the source driver; and

a demultiplexer circuit that includes a plurality of unit circuits supported by the substrate and is disposed in the peripheral region, wherein

each of the plurality of unit circuits of the demultiplexer circuit splits a display signal from one signal output line among the plurality of signal output lines to n (where n is an integer equal to or greater than 2) source bus lines among the plurality of source bus lines,

each of the plurality of unit circuits includes

n branch lines connected to the one signal output line and

n switching TFTs respectively to each of the n branch lines, being n switching TFTs that individually control a switching on/off of an electrical connection between the n branch lines and the n source bus lines,

the demultiplexer circuit additionally includes a plurality of boost circuits configured to boost a voltage applied to a gate electrode of the n switching TFTs,

each of the plurality of boost circuits includes

a set section that pre-charges a node connected to the gate electrode,

a boost section that boosts a potential of the node pre-charged by the set section, and

a reset section that resets the potential of the node, and

provided that the node boosted by the boost section of a first boost circuit among the plurality of boost circuits is called a first node and the node boosted by the boost section of a second boost circuit different from the first boost circuit is called a second node,

the demultiplexer circuit additionally includes an equalizer circuit configured to perform charge-sharing such that a charge moves from the first node to the second node and that the first node and the second node have an identical potential, by electrically connecting the first node and the second node.

2. The active matrix substrate according to claim 1 , wherein

the demultiplexer circuit additionally includes an equalizer signal line that supplies an equalizer signal to the equalizer circuit, and

the equalizer circuit includes an equalizer TFT that includes a gate electrode connected to the equalizer signal line, and a source electrode and a drain electrode of which one is connected to the first node and the other is connected to the second node.

3. The active matrix substrate according to claim 1 , wherein

the n switching TFTs included in each of the plurality of unit circuits include two switching TFTs that are switched on at mutually different timings inside one horizontal scanning period,

the first boost circuit is connected to one of the two switching TFTs, and

the second boost circuit is connected to the other of the two switching TFTs.

4. The active matrix substrate according to claim 3 , wherein

the demultiplexer circuit includes

a first driving signal line that supplies a first driving signal to the set section,

a second driving signal line that supplies a second driving signal to the reset section, and

a third driving signal line that supplies a third driving signal to the boost section, and

the first driving signal line for the first boost circuit doubles as the second driving signal line for the second boost circuit, and the first driving signal line for the second boost circuit doubles as the second driving signal line for the first boost circuit.

5. The active matrix substrate according to claim 1 , wherein

the n switching TFTs included in each of the plurality of unit circuits are two switching TFTs, and

the plurality of boost circuits include two boost circuits respectively connected to the two switching TFTs.

6. The active matrix substrate according to claim 1 , wherein

the n switching TFTs included in each of the plurality of unit circuits are two switching TFTs, and

the two switching TFTs are a first switching TFT and a second switching TFT that are switched on at mutually different timings inside one horizontal scanning period, and

the plurality of boost circuits include a boost circuit connected in common to the first switching TFT of two unit circuits among the plurality of unit circuits and a boost circuit connected in common to the second switching TFT of the two unit circuits.

7. The active matrix substrate according to claim 1 , wherein

the n switching TFTs included in each of the plurality of unit circuits are two switching TFTs, and

the two switching TFTs are a first switching TFT and a second switching TFT that are switched on at mutually different timings inside one horizontal scanning period, and

the plurality of boost circuits include a boost circuit connected in common to the first switching TFT of three or more unit circuits among the plurality of unit circuits and a boost circuit connected in common to the second switching TFT of the three or more unit circuits.

8. The active matrix substrate according to claim 1 , wherein

the n switching TFTs included in each of the plurality of unit circuits are three switching TFTs,

the three switching TFTs are a first switching TFT, a second switching TFT, and a third switching TFT that are switched on at mutually different timings inside one horizontal scanning period, and

the plurality of boost circuits include a boost circuit connected in common to the first switching TFT of three or more unit circuits among the plurality of unit circuits, a boost circuit connected in common to the second switching TFT of the three or more unit circuits, and a boost circuit connected in common to the third switching TFT of the three or more unit circuits.

9. The active matrix substrate according to claim 1 , wherein

the demultiplexer circuit additionally includes a plurality of clear circuits that are respectively connected to the plurality of boost circuits and that initialize a corresponding boost circuit at a predetermined timing.

10. The active matrix substrate according to claim 1 , wherein

each of the set section and the reset section includes a plurality of TFTs connected in series to each other.

11. The active matrix substrate according to claim 1 , wherein

the plurality of boost circuits include two or more boost circuits driven at the same timing, and

the demultiplexer circuit includes a first driving signal line group that supplies a driving signal group for driving a subset of boost circuits among the two or more boost circuits and a second driving signal line group that supplies a driving signal group for driving another subset of boost circuits among the two or more boost circuits, the second driving signal line group being different from the first driving signal line group.

12. The active matrix substrate according to claim 1 , wherein

each of the n switching TFTs includes an oxide semiconductor layer as an active layer.

13. The active matrix substrate according to claim 12 , wherein

the oxide semiconductor layer contains an In—Ga—Zn—O semiconductor.

14. The active matrix substrate according to claim 13 , wherein

the In—Ga—Zn—O semiconductor includes a crystalline portion.

15. The active matrix substrate according to claim 1 , wherein

each of the n switching TFTs is a PMOS transistor that includes a polycrystalline silicon semiconductor layer as an active layer.

16. A display device comprising the active matrix substrate according to claim 1 .

17. An active matrix substrate having a display region that includes a plurality of pixel regions and a peripheral region positioned at a periphery of the display region, the active matrix substrate comprising:

a substrate;

a source driver that includes a plurality of gate bus lines and a plurality of source bus lines provided on the substrate, and a source driver that is disposed in the peripheral region and includes a plurality of output terminals;

a plurality of signal output lines respectively connected to each of the plurality of output terminals of the source driver; and

a demultiplexer circuit that includes a plurality of unit circuits supported by the substrate and is disposed in the peripheral region, wherein

each of the plurality of unit circuits of the demultiplexer circuit splits a display signal from one signal output line among the plurality of signal output lines to n (where n is an integer equal to or greater than 2) source bus lines among the plurality of source bus lines,

each of the plurality of unit circuits includes

n branch lines connected to the one signal output line and

n switching TFTs respectively to each of the n branch lines, being n switching TFTs that individually control a switching on/off of an electrical connection between the n branch lines and the n source bus lines,

the demultiplexer circuit additionally includes a plurality of boost circuits configured to boost a voltage applied to a gate electrode of the n switching TFTs,

each of the plurality of boost circuits includes

a set section that pre-charges a node connected to the gate electrode,

a boost section that boosts a potential of the node pre-charged by the set section, and

a reset section that resets the potential of the node, and

provided that the node boosted by the boost section of a first boost circuit among the plurality of boost circuits is called a first node and the node boosted by the boost section of a second boost circuit different from the first boost circuit is called a second node,

the demultiplexer circuit additionally includes an equalizer circuit configured to perform charge-sharing between the first node and the second node by electrically connecting the first node and the second node,

the n switching TFTs included in each of the plurality of unit circuits are three switching TFTs,

each of the plurality of unit circuits includes three boost circuits among the plurality of boost circuits, and

each of the three boost circuits is connected to each of the three switching TFTs.

18. An active matrix substrate having a display region that includes a plurality of pixel regions and a peripheral region positioned at a periphery of the display region, the active matrix substrate comprising:

a substrate;

a source driver that includes a plurality of gate bus lines and a plurality of source bus lines provided on the substrate, and a source driver that is disposed in the peripheral region and includes a plurality of output terminals;

a plurality of signal output lines respectively connected to each of the plurality of output terminals of the source driver; and

a demultiplexer circuit that includes a plurality of unit circuits supported by the substrate and is disposed in the peripheral region, wherein

each of the plurality of unit circuits of the demultiplexer circuit splits a display signal from one signal output line among the plurality of signal output lines to n (where n is an integer equal to or greater than 2) source bus lines among the plurality of source bus lines,

each of the plurality of unit circuits includes

n branch lines connected to the one signal output line and

n switching TFTs respectively to each of the n branch lines, being n switching TFTs that individually control a switching on/off of an electrical connection between the n branch lines and the n source bus lines,

the demultiplexer circuit additionally includes a plurality of boost circuits configured to boost a voltage applied to a gate electrode of the n switching TFTs,

each of the plurality of boost circuits includes

a set section that pre-charges a node connected to the gate electrode,

a boost section that boosts a potential of the node pre-charged by the set section, and

a reset section that resets the potential of the node, and

provided that the node boosted by the boost section of a first boost circuit among the plurality of boost circuits is called a first node and the node boosted by the boost section of a second boost circuit different from the first boost circuit is called a second node,

the demultiplexer circuit additionally includes an equalizer circuit configured to perform charge-sharing between the first node and the second node by electrically connecting the first node and the second node,

the n switching TFTs included in each of the plurality of unit circuits are three switching TFTs,

the three switching TFTs are a first switching TFT, a second switching TFT, and a third switching TFT that are switched on at mutually different timings inside one horizontal scanning period, and

the plurality of boost circuits include a boost circuit connected in common to the first switching TFT of two unit circuits among the plurality of unit circuits, a boost circuit connected in common to the second switching TFT of the two unit circuits, and a boost circuit connected in common to the third switching TFT of the two unit circuits.