Semiconductor device and method

1. A device comprising:

a first fin extending from a substrate;

a first gate stack over and along sidewalls of the first fin;

a first gate spacer disposed along a sidewall of the first gate stack; and

a first epitaxial source/drain region in the first fin and adjacent the first gate spacer, the first epitaxial source/drain region comprising:

a first epitaxial layer on the first fin, the first epitaxial layer extending below the first gate spacer in a direction perpendicular to a major surface of the substrate;

a second epitaxial layer on the first epitaxial layer, wherein the second epitaxial layer extends above a portion of the first gate spacer in the direction perpendicular to the major surface of the substrate; and

a third epitaxial layer on the second epitaxial layer, wherein the first epitaxial layer has a higher concentration of carbon than the second epitaxial layer and the third epitaxial layer.

2. The device of claim 1 , wherein the first epitaxial layer comprises silicon and carbon, wherein the second epitaxial layer has a different material composition from the first epitaxial layer, and wherein the third epitaxial layer has a different material composition from the first epitaxial layer and the second epitaxial layer.

3. The device of claim 1 , wherein the first epitaxial layer separates the second epitaxial layer from the first fin.

4. The device of claim 1 , wherein the third epitaxial layer extends above a portion of the first gate spacer in the direction perpendicular to the major surface of the substrate.

5. The device of claim 1 , wherein the first epitaxial layer has an atomic concentration of carbon in a range from 0.2% to 5%.

6. The device of claim 1 , wherein the first epitaxial layer is thicker at a bottom than at sides of the first epitaxial source/drain region.

7. The device of claim 1 , wherein the second epitaxial layer is in contact with a side surface of the first gate spacer.

8. A device comprising:

a fin extending upwards from a substrate;

a gate electrode over the fin; and

an epitaxial source/drain region in the fin, the epitaxial source/drain region comprising:

a first epitaxial region on the fin, the first epitaxial region extending below a portion of the fin in a direction perpendicular to a major surface of the substrate;

a second epitaxial region on the first epitaxial region, wherein the first epitaxial region extends between the second epitaxial region and the fin, wherein a top surface of the second epitaxial region extends above a bottom surface of the gate electrode in the direction perpendicular to the major surface of the substrate; and

a third epitaxial region on the second epitaxial region, wherein the first epitaxial region has a higher atomic concentration of carbon than the second epitaxial region and the third epitaxial region.

9. The device of claim 8 , wherein the first epitaxial region comprises silicon and carbon.

10. The device of claim 9 , wherein the first epitaxial region further comprises phosphorous.

11. The device of claim 8 , wherein the second epitaxial region has a different material composition from the first epitaxial region, and wherein the third epitaxial region has a different material composition from the first epitaxial region and the second epitaxial region.

12. The device of claim 8 , wherein a sidewall of the first epitaxial region has a first thickness in a direction parallel to the major surface of the substrate, wherein a bottom portion of the first epitaxial region has a second thickness in the direction perpendicular to the major surface of the substrate, and wherein a ratio of the first thickness to the second thickness is from 0.3 to 1.3.

13. The device of claim 8 , wherein the first epitaxial region has an atomic concentration of carbon from 0.2% to 5%.

14. The device of claim 8 , wherein the second epitaxial region is separated from contacting the fin by the first epitaxial region.

15. A device comprising:

a semiconductor fin extending from a substrate;

a gate stack extending on a top surface and sidewalls of the semiconductor fin;

a gate spacer extending on a sidewall of the gate stack; and

a source/drain region in the semiconductor fin and adjacent the gate spacer, wherein at least a portion of the source/drain region extends below the gate spacer in a direction perpendicular to a major surface of the substrate, the source/drain region comprising:

a first source/drain region on the semiconductor fin;

a second source/drain region on the first source/drain region; and

a third source/drain region on the second source/drain region, the first source/drain region having a greater concentration of carbon than the second source/drain region and the third source/drain region, wherein the second source/drain region and the third source/drain region contact a side surface of the gate spacer.

16. The device of claim 15 , wherein the first source/drain region extends below the gate spacer in the direction perpendicular to the major surface of the substrate.

17. The device of claim 15 , further comprising a source/drain contact, the source/drain contact contacting an uppermost surface of the third source/drain region.

18. The device of claim 15 , wherein the third source/drain region has a greater concentration of phosphorous, boron, or germanium dopants than the second source/drain region.

19. The device of claim 15 , wherein the second source/drain region has a greater concentration of phosphorous, boron, or germanium dopants than the third source/drain region.

20. The device of claim 15 , wherein the first source/drain region comprises silicon and carbon, and wherein the first source/drain region has an atomic concentration of carbon from 0.2% to 5%.