IP Library › Granted Patent US 11,329,083
Granted Patent B2
US 11,329,083 · App. 16/227,138 · Granted May 10, 2022

Wafer level image sensor package

Inventors: Wen-Hau Wu (New Taipei, TW); Chun-Hao Chuang (Hsinchu, TW); Kazuaki Hashimoto (Zhubei, TW); Keng-Yu Chou (Kaohsiung, TW); Wei-Chieh Chiang (Yuanlin Township, TW); Cheng Yu Huang (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L27/14618H01L27/14621H01L27/14627H01L27/14636H01L27/14685
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Quick Facts
Patent No.
US 11,329,083
App. No.
16/227,138
Granted
May 10, 2022
Kind
B2
Abstract

An image sensor package is provided. The image sensor package comprises a package substrate, and an image sensor chip arranged over the package substrate. The integrated circuit device further comprises a protection layer overlying the image sensor chip having a planar top surface and a bottom surface lining and contacting structures under the protection layer, and an on-wafer shield structure spaced around a periphery of the image sensor chip. The height of the image sensor package can be reduced since a discrete cover glass or an infrared filter and corresponding intervening materials are no longer needed since being replaced by the build in protection layer. The size of the image sensor package can be reduced since a discrete light shield and corresponding intervening materials are no longer needed since being replaced by the build in on wafer light shield structure.

Claims (49)

1. An image sensor package, comprising:

a package substrate;

an image sensor chip arranged over the package substrate and comprising a device layer having a pixel sensing array disposed therein, a color filter array disposed over a topmost surface of the device layer, and a micro lens array disposed over the color filter array;

a protection layer overlying the micro lens array and having a planar top surface and a bottom surface lining and directly contacting structures under the protection layer;

an on-wafer lens having a convex top surface and arranged above the micro lens array and under the protection layer; and

an on-wafer shield structure of single material spaced around a periphery of the image sensor chip and having a sidewall directly contacting sidewalls of the protection layer and the device layer;

wherein the on-wafer lens has a sidewall that directly contacts the sidewall of the on-wafer shield structure.

2. The image sensor package according to claim 1 , wherein the planar top surface of the protection layer is aligned with a top surface of the on-wafer shield structure.

3. The image sensor package according to claim 1 , further comprising:

an on-wafer filtering coating arranged above the image sensor chip and under the on-wafer lens;

wherein the on-wafer filtering coating is configured to filter infrared light.

4. The image sensor package according to claim 3 , wherein the on-wafer filtering coating has a sidewall that directly contacts the sidewall of the on-wafer shield structure.

5. The image sensor package according to claim 1 , wherein the protection layer directly contacts the micro lens array.

6. The image sensor package according to claim 1 , further comprising:

a flatness layer arranged between the color filter array and the micro lens array,

wherein the flatness layer has a sidewall directly contacting the sidewall of the on-wafer shield structure.

7. The image sensor package according to claim 1 , wherein the on-wafer shield structure comprises an upper portion and a lower portion, wherein the upper portion is wider than or equal to the lower portion.

8. The image sensor package according to claim 7 , wherein the lower portion directly contacts sidewalls of the package substrate, a metallization stack between the package substrate and the device layer, and the device layer.

9. The image sensor package according to claim 7 , wherein the upper portion sits on and has a bottom surface directly contacting a top surface of a flatness layer arranged between the color filter array and the micro lens array.

10. An image sensor package, comprising:

a first substrate;

a metallization stack disposed over the first substrate;

a device layer disposed over the metallization stack and having a pixel sensing array disposed therein;

a color filter array disposed over the pixel sensing array;

a micro lens array disposed over the color filter array;

a protection layer overlying the micro lens array;

an on-wafer lens having a convex top surface and an on-wafer filtering coating configured to filter infrared light, the on-wafer lens and the on-wafer filtering coating arranged between the micro lens array and the protection layer; and

a seamless on-wafer shield structure spaced around a periphery of the image sensor package and comprising a lower portion surrounding and directly contacting sidewalls of the first substrate and an upper portion wider than the lower portion and directly contacting sidewalls of the protection layer;

wherein the on-wafer filtering coating has a sidewall that directly contacts a sidewall of the seamless on-wafer shield structure.

11. The image sensor package according to claim 10 , wherein the protection layer has a top surface aligned with a top surface of the seamless on-wafer shield structure.

12. The image sensor package according to claim 10 , wherein a bottom surface of the on-wafer filtering coating, the on-wafer lens, or the protection layer is aligned with a bottom surface of the seamless on-wafer shield structure.

13. The image sensor package according to claim 10 , wherein the upper portion of the seamless on-wafer shield structure is wider than the lower portion.

14. An image sensor, comprising:

a first substrate having a pixel sensing array disposed on a front side;

a color filter array disposed over the pixel sensing array;

a micro lens array disposed over the color filter array;

an on-wafer filtering coating arranged directly contacting the micro lens array;

an on-wafer lens having a convex top surface and arranged directly contacting the on-wafer filtering coating;

a module lens disposed over the micro lens array;

a protection layer disposed on the convex top surface of the on-wafer lens; and

an on-wafer shield structure spaced around and directly contacting sidewalls of the first substrate, the on-wafer lens, and the protection layer.

15. The image sensor according to claim 14 , further comprising:

additional module lens attached above the protection layer and the on-wafer shield structure; and

electrical connection structures disposed through the first substrate and connected from a back side of the first substrate opposite to the front side.

16. The image sensor according to claim 14 , wherein the on-wafer shield structure has a narrower lower portion adjoining the first substrate and a wider upper portion adjoining the protection layer.

17. The image sensor according to claim 14 , wherein the on-wafer filtering coating has a sidewall that directly contacts a sidewall of the on-wafer shield structure.

18. The image sensor according to claim 14 , further comprising a flatness layer arranged between the color filter array and the micro lens array.

19. The image sensor according to claim 18 , wherein the flatness layer has a sidewall directly contacting a sidewall of the on-wafer shield structure.

20. The image sensor according to claim 18 , wherein the on-wafer filtering coating has a bottom surface directly contacting the flatness layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2019
From: WU, WEN-HAU; CHUANG, CHUN-HAO; HASHIMOTO, KAZUAKI; CHOU, KENG-YU; CHIANG, WEI-CHIEH; HUANG, CHENG YU
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 048067/0261 →
Continuity (2)
Provisional Application 62736679 · Sep 26, 2018
Related Publication 20200098808A1 · Mar 26, 2020