IP Library Granted Patent US 11,330,203
Granted Patent B2
US 11,330,203 · App. 17/250,392 · Granted May 10, 2022

Imaging device and electronic device

Inventors: Yoshimichi Kumagai (Kanagawa, JP); Takashi Abe (Kanagawa, JP); Ryoto Yoshita (Kanagawa, JP); Ryo Fukui (Kanagawa, JP)
Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
H04N5/353H04N5/374H04N5/378
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Quick Facts
Patent No.
US 11,330,203
App. No.
17/250,392
Granted
May 10, 2022
Kind
B2
Abstract

The present technology relates to an imaging device and an electronic device which enable image capturing based on the global shutter system, without reducing the amount of saturated signal charge. Pixels each including a photoelectric conversion unit that converts light received thereon into electric charge, and a holding unit that holds the electric charge transferred from the photoelectric conversion unit, a floating diffusion that is shared among a plurality of the pixels, and that holds the electric charge transferred from the holding unit, and a boost line through which the floating diffusion is boosted are included. The present technology is applicable, for example, to an imaging device to capture images on the basis of a global shutter system.

Claims (55)

1. An imaging device, comprising:

a plurality of pixels, wherein each pixel of the plurality of pixels includes:

an amplification transistor;

a photoelectric conversion unit configured to:

receive light;

convert the received light into electric charge; and

output the electric charge;

a holding unit configured to:

receive the electric charge output from the photoelectric conversion unit; and

hold the received electric charge;

a plurality of floating diffusions shared among the plurality of pixels, wherein each floating diffusion of the plurality of floating diffusions is configured to:

receive the electric charge from the holding unit; and

hold the electric charge received from the holding unit;

an interconnect line configured to connect the plurality of floating diffusions; and

a plurality of boost lines that includes a first boost line and a second boost line, wherein

each boost line of the plurality of boost lines is configured to boost the plurality of floating diffusions,

the first boost line is different from the second boost line,

the first boost line is parallel to the interconnect line, and

the second boost line is in contact with a gate of the amplification transistor.

2. The imaging device according to claim 1 , wherein the imaging device is configured to capture an image based on a global shutter system.

3. The imaging device according to claim 1 , wherein the first boost line is within a proximity of the interconnect line.

4. The imaging device according to claim 3 , wherein the first boost line and the interconnect line are in the same layer of the imaging device.

5. The imaging device according to claim 3 , wherein the first boost line and the interconnect line are in different layers of the imaging device.

6. The imaging device according to claim 1 , wherein the amplification transistor is configured to output a voltage signal corresponding to a potential of a floating diffusion of the plurality of floating diffusions.

7. The imaging device according to claim 1 , further comprising a switching unit configured to switch a capacitance of the plurality of floating diffusions.

8. The imaging device according to claim 1 , further comprising a readout gate configured to read out the electric charge from the holding unit, wherein the readout gate is in a vertical direction and in a horizontal direction relative to the photoelectric conversion unit.

9. The imaging device according to claim 1 , wherein each pixel of the plurality of pixels is configured to read out the electric charge from the photoelectric conversion unit based on a CCD system.

10. The imaging device according to claim 3 , further comprising a control line orthogonal to the interconnect line, wherein the control line is configured to control application of a voltage to the first boost line.

11. The imaging device according to claim 3 , further comprising a control line in parallel to the interconnect line, wherein the control line is configured to control application of a voltage to the first boost line.

12. An electronic device, comprising:

an imaging device that includes:

a plurality of pixels, wherein each pixel of the plurality of pixels includes:

an amplification transistor;

a photoelectric conversion unit configured to:

receive light;

convert the received light into electric charge; and

output the electric charge;

a holding unit configured to:

receive the electric charge output from the photoelectric conversion unit; and

hold the received electric charge;

a plurality of floating diffusions shared among the plurality of pixels, wherein each floating diffusion of the plurality of floating diffusions is configured to:

receive the electric charge from the holding unit; and

hold the electric charge received from the holding unit;

an interconnect line configured to connect the plurality of floating diffusions; and

a plurality of boost lines that includes a first boost line and a second boost line, wherein

each boost line of the plurality of boost lines is configured to boost the plurality of floating diffusions,

the first boost line is different from the second boost line,

the first boost line is parallel to the interconnect line, and

the second boost line is in contact with a gate of the amplification transistor; and

a processing unit configured to process a signal from the imaging device.

13. The imaging device according to claim 1 , further comprising:

a conversion interconnect outside the first boost line; and

a switching unit configured to:

control a connection between the interconnect line and the conversion interconnect, and

control capacitance of the plurality of floating diffusions.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 9, 2021
From: KUMAGAI, YOSHIMICHI; ABE, TAKASHI; YOSHITA, RYOTO; FUKUI, RYO
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 057125/0323 →
Priority Claims (2)
JP JP2018-138644 · Jul 24, 2018 · national
JP JP2018-142341 · Jul 30, 2018 · national
Continuity (1)
Related Publication 20210266476A1 · Aug 26, 2021
Cited By (1)
US 12,323,721