IP Library › Granted Patent US 11,330,526
Granted Patent B2
US 11,330,526 · App. 17/128,727 · Granted May 10, 2022

System and method for optimizing power consumption in video communications in mobile devices

Inventor: Narasimhan Vijay Anand (Bengaluru, IN)
Assignee: TriSpace Technologies (OPC) Pvt. Ltd.
H04W52/0261H04N5/44H04N7/147H04N19/86
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Quick Facts
Patent No.
US 11,330,526
App. No.
17/128,727
Granted
May 10, 2022
Kind
B2
Abstract

The present invention provides a system and method for optimizing power consumption in video communication in mobile devices. The system comprises a video codec encoder module, a video codec decoder module and post-processing filtering module (Deblocking filter) modules. The post-processing modules are implemented on a DSP/VLIW processor, while the video encoder and decoder modules are implemented on a CPU with SIMD extensions. This pipelined implementation of modules in multi-core reduces current consumption in the SoC by up to 50 percent compared to an implementation of the modules in a single/multiple DSP/VLIW core. The significant reduction in current consumption of the modules enables reduction of power consumption in the video call time. Thus, the invention provides a simple method of optimizing power consumption by multi core implementation of the modules in a video call in mobile devices.

Claims (33)

1. A system ( 100 ) for optimizing power consumption in video communication in mobile devices, the system ( 100 ) comprising:

a. a camera ( 101 ) integrated in the mobile device to receive and record input video frame samples in 8-bit resolution, 10-bit resolution or any resolution;

b. a video code encoder module ( 102 ) configured to compress/encode video signals for efficient transmission over wireless channels, wherein the implementation is performed on a CPU with SIMD extensions, wherein the encoded signals are transmitted via network ( 105 );

c. Filter modules including, deblocking filter ( 103 ), wherein the filter module ( 103 ) receives previously processed video frame samples from the encoder ( 101 ), wherein the filtering module ( 103 ) is implemented in a DSP/VLIW processor;

d. a video codec decoder module ( 106 ) configured to decompress/decode the received compressed video signal from network ( 105 ), wherein the video codec decoder is implemented on a CPU with SIMD extensions, wherein the video codec decoder module ( 106 ) is present at receiving end;

e. filtering modules including deblocking filter ( 107 ), wherein the decoded video frame samples are filtered on a DSP/VLIW core;

f. saturation is turned off in the video codec encoder/decoder modules; wherein the encoder/decoder modules are implemented on a CPU with SIMD extensions;

g. the SoC is designed to have CPU with SIMD extensions and DSP/VLIW processing core to have pipelined implementation of the video communication modules between the two cores; where in the Arithmetic Logic Unit (ALU) of CPU is designed without saturation in the critical instructions, wherein the critical instructions include Multiply and Accumulate (MAC) and shift instructions, and

h. a video receiver ( 108 ) configured to receive video frame samples from filtering module ( 107 ).

2. The system as claimed in claim 1 , wherein the video codec module ( 102 , 106 ) includes MPEG-1, MPEG-2, MPEG-4, H.264, H.265, AV1, VP8, VP10 standard video codes.

3. The system as claimed in claim 1 , wherein the mobile device includes portable cell phone, mobile handset, mobile phone, wireless phone, cellular phone, portable phone, a personal digital assistant (PDA), and smartphones.

4. The system as claimed in claim 1 , wherein the optimizing power consumption is applicable in video playback and video record with no transmission.

5. The system as claimed in claim 1 , wherein the current consumption is reduced by up to 50 percent in video communication compared to implementation of all the modules (video codec encoder, video codec decoder, filtering (Deblocking filter) and Post-processing) on a single or multiple DSP/VLIW processor in the SoC.

6. A method for optimizing power consumption in mobile devices, the method comprising the steps of:

a. a camera ( 101 ) integrated in the mobile device to receive and record input video frame samples in 8-bit resolution, 10-bit resolution or any resolution;

b. a video code encoder module ( 102 ) configured to compress/encode video signals for efficient transmission over wireless channels, wherein the implementation is performed on a CPU with SIMD extensions, wherein the encoded signals are transmitted via network ( 105 );

c. Filter modules including, but not limited to, deblocking filter ( 103 ), wherein the filter module ( 103 ) receives previously processed video frame samples from the encoder ( 101 ), wherein the filtering module ( 103 ) is implemented in a DSP/VLIW processor;

d. a video codec decoder module ( 106 ) configured to decompress/decode the received compressed video signal from network ( 105 ), wherein the video codec decoder is implemented on a CPU with SIMD extensions, wherein the video codec decoder module ( 106 ) is present at receiving end;

e. filtering modules including, but not limited to deblocking filter ( 107 ), wherein the decoded video frame samples are filtered on a DSP/VLIW core;

f. saturation is turned off in the video codec encoder/decoder modules; wherein the encoder/decoder modules are implemented on a CPU with SIMD extensions;

g. the SoC is designed to have CPU with SIMD extensions and DSP/VLIW processing core to have pipelined implementation of the video communication modules between the two cores; where in the Arithmetic Logic Unit (ALU) of CPU is designed without saturation in the critical instructions, wherein the critical instruction include but not limited to Multiply and Accumulate (MAC) and shift instructions; and

h. a video receiver ( 108 ) configured to receive video frame samples from filtering module ( 107 ).

7. The method as claimed in claim 6 , wherein the video codec modules ( 102 , 106 ) includes, but not limited to, MPEG-1, MPEG-2, MPEG-4, H.264, H.265, AV1, VP8, VP10 standard video codecs.

8. The method as claimed in claim 6 , wherein the mobile device includes portable cell phone, mobile handset, mobile phone, wireless phone, cellular phone, portable phone, a personal digital assistant (PDA) and smartphones.

9. A system ( 100 ) for optimizing power consumption in video communication in mobile devices, the system ( 100 ) comprising:

a. a camera ( 101 ) integrated in the mobile device to receive and record input video frame samples in 8-bit resolution, 10-bit resolution or any resolution, wherein the mobile device includes portable cell phone, mobile handset, mobile phone, wireless phone, cellular phone, portable phone, a personal digital assistant (PDA), and smartphones;

b. a video code encoder module ( 102 ) configured to compress/encode video signals for efficient transmission over wireless channels, wherein the implementation is performed on a CPU with SIMD extensions, wherein the encoded signals are transmitted via network ( 105 ), video codec module ( 102 , 106 ) includes MPEG-1, MPEG-2, MPEG-4, H.264, H.265, AV1, VP8, VP10 standard video codecs;

c. Filter modules including deblocking filter ( 103 ), wherein the filter module ( 103 ) receives previously processed video frame samples from the encoder ( 101 ), wherein the filtering module ( 103 ) is implemented in a DSP/VLIW processor;

d. a video codec decoder module ( 106 ) configured to decompress/decode the received compressed video signal from network ( 105 ), wherein the video codec decoder is implemented on a CPU with SIMD extensions, wherein the video codec decoder module ( 106 ) is present at receiving end;

e. filtering modules including deblocking filter ( 107 ), wherein the decoded video frame samples are filtered on a DSP/VLIW core;

f. saturation is turned off in the video codec encoder/decoder modules; wherein the encoder/decoder modules are implemented on a CPU with SIMD extensions;

g. the SoC is designed to have CPU with SIMD extensions and DSP/VLIW processing core to have pipelined implementation of the video communication modules between the two cores; where in the Arithmetic Logic Unit (ALU) of CPU is designed without saturation in the critical instructions, wherein the critical instructions include Multiply and Accumulate (MAC) and shift instructions, and

h. a video receiver ( 108 ) configured to receive video frame samples from filtering module ( 107 ), wherein the optimizing power consumption is applicable in video playback and video record with no transmission, and the current consumption is reduced by up to 50 percent in video communication compared to implementation of all the modules (video codec encoder, video codec decoder, filtering (Deblocking filter) and Post-processing) on a single or multiple DSP/VLIW processor in the SoC.

Assignments (2)
CHANGE OF NAME Recorded Apr 28, 2026
From: TRISPACE TECHNOLOGIES (OPC) PRIVATE LIMITED
To: TRISPACE TECHNOLOGIES PRIVATE LIMITED
Reel/Frame 075481/0262 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2020
From: ANAND, NARASIMHAN VIJAY
To: TRISPACE TECHNOLOGIES (OPC) PVT. LTD.
Reel/Frame 054709/0218 →
Priority Claims (1)
IN 202041022525 · May 29, 2020 · national
Continuity (1)
Related Publication 20210377868A1 · Dec 2, 2021
Cited By (2)
US 12,248,348 US 12,597,224