IP Library Granted Patent US 11,353,668
Granted Patent B2
US 11,353,668 · App. 17/070,763 · Granted Jun 7, 2022

Packaging with substrate and printed circuit board cutouts

Inventors: Ashley J. M. Erickson (Danville, CA); Vipulkumar K. Patel (Breinigsville, PA); Aparna R. Prasad (San Jose, CA)
Assignee: Cisco Technology, Inc.
G02B6/428G02B6/12004G02B6/13G02B6/4269G02B2006/12085
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Quick Facts
Patent No.
US 11,353,668
App. No.
17/070,763
Granted
Jun 7, 2022
Kind
B2
Abstract

An integrated circuit (IC) package having multiple ICs is provided. The IC package includes a printed circuit board (PCB) having a cutout region and a substrate disposed above the PCB. The substrate includes a first cavity on a first surface of the substrate. The IC package also includes a first IC disposed on a second surface of the substrate and in the cutout region of the PCB, The IC package further includes a second IC disposed above the substrate, and a first device disposed on the second IC and in the first cavity on the first surface of the substrate.

Claims (38)

1. An integrated circuit (IC) package, comprising:

a printed circuit board (PCB) having a cutout region;

a substrate disposed above the PCB, wherein the substrate comprises (i) a first cavity on a first surface of the substrate and (ii) a second cavity on the first surface of the substrate;

a first IC disposed on a second surface of the substrate and in the cutout region of the PCB;

a second IC disposed above the substrate; and

a first device disposed on the second IC and in the first cavity on the first surface of the substrate.

2. The IC package of claim 1 , further comprising a second device coupled to the second IC, wherein the second device is at least partially disposed in the second cavity.

3. The IC package of claim 2 , wherein the second device is an optical device or a fiber array unit (FAU).

4. The IC package of claim 2 , wherein the PCB further comprises a cavity disposed adjacent to the cutout region and below the second device.

5. The IC package of claim 1 , wherein the first device comprises a third IC.

6. The IC package of claim 1 , wherein the first device comprises a laser.

7. The IC package of claim 6 , further comprising a third IC disposed on the first surface of the substrate.

8. The IC package of claim 1 , further comprising a heat sink disposed on the first IC through the cutout region of the PCB.

9. A method for fabricating an integrated circuit (IC) package, comprising:

forming a printed circuit board (PCB) having a cutout region;

forming a substrate above the PCB, the substrate having at least (i) a first cavity on a first surface of the substrate and (ii) a second cavity on the first surface of the substrate;

forming a first IC on a second surface of the substrate and in the cutout region of the PCB;

forming a second IC above the substrate; and

forming a first device on the second IC and in the first cavity on the first surface of the substrate.

10. The method of claim 9 , further comprising forming a second device coupled to the second IC, wherein the second device is at least partially disposed in the second cavity.

11. The method of claim 10 , wherein the second device is an optical device or a fiber array unit (FAU).

12. The method of claim 10 , wherein forming the PCB further comprises forming a cavity adjacent to the cutout region and below the second device.

13. The method of claim 9 , wherein the first device comprises a third IC.

14. The method of claim 9 , wherein the first device comprises a laser.

15. The method of claim 14 , further comprising forming a third IC on the first surface of the substrate.

16. The method of claim 9 , further comprising forming a heat sink on the first IC through the cutout region of the PCB.

17. An optical transceiver module having a package comprising a plurality of integrated circuits (ICs), the package comprising:

a printed circuit board (PCB) having a cutout region;

a substrate disposed above the PCB, wherein the substrate comprises a first cavity on a top surface of the substrate;

a first IC of the plurality of ICs disposed on a bottom surface of the substrate and in the cutout region of the PCB;

a second IC of the plurality of ICs disposed above the substrate;

a third IC of the plurality of ICs disposed on the second IC and in the first cavity on the top surface of the substrate; and

an optical device coupled to the second IC.

18. The optical transceiver module of claim 17 , wherein:

the substrate further comprises a second cavity on the top surface of the substrate; and

the optical device is partially disposed in the second cavity.

19. The optical transceiver module of claim 17 , the package further comprising a heat sink disposed on the first IC through the cutout region of the PCB.

20. The optical transceiver module of claim 17 , wherein the PCB further comprises a cavity disposed adjacent to the cutout region and below the optical device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2020
From: ERICKSON, ASHLEY J.M.; PATEL, VIPULKUMAR K.; PRASAD, APARNA R.
To: CISCO TECHNOLOGY, INC.
Reel/Frame 054056/0946 →
Continuity (1)
Related Publication 20220113480A1 · Apr 14, 2022
Cited By (2)
US 12,332,490 US 12,442,994