Semiconductor device having buried gate structure and method for fabricating the same
A semiconductor device includes: a substrate; a first source/drain region and a second source/drain region spaced apart from each other by a trench in the substrate; and a gate structure in the trench, wherein the gate structure includes: a gate dielectric layer formed on a bottom and sidewalls of the trench; a first gate electrode positioned in a bottom portion of the trench over the gate dielectric layer; a second gate electrode positioned over the first gate electrode; and a dipole inducing layer formed between the first gate electrode and the second gate electrode and between sidewalls of the second gate electrode and the gate dielectric layer.
1. A method for fabricating a semiconductor device, comprising: forming a trench in a substrate; forming a gate dielectric layer on a surface of the trench; forming a first gate electrode over the gate dielectric layer to fill a bottom portion of the trench; forming a sacrificial layer including a dipole inducing chemical species over the first gate electrode and the gate dielectric layer; exposing the sacrificial layer to a thermal treatment to diffuse the dipole inducing chemical species from the sacrificial layer into a portion of the gate dielectric layer and an upper portion of the first gate electrode; removing the sacrificial layer; and forming a second gate electrode over the first gate electrode in contact with the dipole inducing chemical species.
2. The method of claim 1 , wherein the sacrificial layer includes a lanthanum atom.
3. The method of claim 1 , wherein the sacrificial layer includes a lanthanum oxide.
4. The method of claim 1 , wherein the sacrificial layer includes a lanthanum oxide, and the gate dielectric layer includes a silicon oxide.
5. The method of claim 1 , wherein the first gate electrode and the second gate electrode include a metal nitride.
6. The method of claim 1 , wherein the first gate electrode includes a metal, and the second gate electrode includes a metal oxide.
7. The method of claim 1 , wherein the first gate electrode includes a metal-based material, and the second gate electrode includes an N-type doped polysilicon.
8. The method of claim 1 , wherein the upper portion of the first gate electrode includes a lanthanum atom-containing titanium nitride, a lanthanum atom-containing tungsten, or a stack thereof.
9. The method of claim 1 , further comprising:
forming a fin region below the trench, before the forming of the gate dielectric layer,
wherein the gate dielectric layer and the first gate electrode cover a top surface and sidewalls of the fin region.
10. The method of claim 1 , further comprising:
forming a capping layer over the second gate electrode, after the forming of the second gate electrode; and
forming a first source/drain region and a second source/drain region of a depth overlapping with the capping layer and the second gate electrode in the substrate.
11. A method for fabricating a semiconductor device, comprising: forming a trench in a substrate; forming a gate dielectric layer on a surface of the trench; forming a first gate electrode over the gate dielectric layer to fill a bottom portion of the trench; forming an anti-oxidation barrier over the first gate electrode; forming a sacrificial layer including a dipole inducing chemical species over the anti-oxidation barrier layer and the gate dielectric layer; exposing the sacrificial layer to a thermal treatment to diffuse the dipole inducing chemical species from the sacrificial layer into a portion of the gate dielectric layer and the anti-oxidation barrier layer; removing the sacrificial layer; and forming a second gate electrode over the anti-oxidation barrier layer.
12. The method of claim 11 , wherein the anti-oxidation barrier includes a metal nitride.
13. The method of claim 11 , wherein in the exposing of the sacrificial layer to the thermal treatment,
the dipole inducing chemical species is diffused into an upper portion of the anti-oxidation barrier.
14. The method of claim 13 , wherein the anti-oxidation barrier includes a lanthanum atom-containing titanium nitride.