Silicon carbide semiconductor device
A silicon carbide semiconductor device to be a vertical transistor includes: a silicon carbide semiconductor first layer 21 of a first conductivity type; a silicon carbide semiconductor second layer 22 of a second conductivity type that is different from the first conductivity type on the first layer 21 ; a silicon carbide semiconductor third layer 120 of the first conductivity type on the second layer 22 ; and a groove 30 having a sidewall 30 a at portions of the third layer 120 , the second layer 22 , and the first layer 21 , wherein the third layer 120 has a first area 121 facing the sidewall 30 a of the groove 30 and a second area 122 further away from the sidewall 30 a of the groove 30 than the first area 121 , wherein the second area 122 and the first area 121 are continuous, and wherein the second area 122 is provided deeper than the first area 121 from a surface side of the third layer 130 toward the first layer 21.
1. A silicon carbide semiconductor device that is a vertical transistor, the silicon carbide semiconductor device comprising:
a silicon carbide semiconductor first layer of a first conductivity type;
a silicon carbide semiconductor second layer of a second conductivity type that is different from the first conductivity type on the first layer;
a silicon carbide semiconductor third layer of the first conductivity type on the second layer; and
a groove having a sidewall at portions of the third layer, the second layer, and the first layer,
wherein the third layer has a first area facing the sidewall of the groove and a second area further away from the sidewall of the groove than the first area,
wherein the second area and the first area are continuous, and
wherein the second layer has a surface in direct contact with the third layer, and the surface of the second layer under the second area is provided deeper than the surface of the second layer under the first area by 0.1 μm or more from a surface side of the third layer toward the first layer.
2. The silicon carbide semiconductor device according to claim 1 , further comprising a source electrode in contact with the second area of the third layer.
3. The silicon carbide semiconductor device according to claim 2 ,
wherein the first layer is formed on a first surface of a silicon carbide substrate,
wherein an insulating film is provided within the groove,
wherein a gate electrode is provided on the insulating film, and
wherein a drain electrode is provided on a second surface, which is opposite to the first surface, of the silicon carbide substrate.
4. The silicon carbide semiconductor device according to claim 2 , wherein the source electrode includes Ni.
5. The silicon carbide semiconductor device according to claim 2 wherein the source electrode includes Al, Ti and Si.
6. A silicon carbide semiconductor device that is a vertical transistor, the silicon carbide semiconductor device comprising:
a silicon carbide semiconductor first layer of a first conductivity type;
a silicon carbide semiconductor second layer of a second conductivity type that is different from the first conductivity type on the first layer;
a silicon carbide semiconductor third layer of the first conductivity type on the second layer; and
a groove having a sidewall at portions of the third layer, the second layer, and the first layer,
wherein the third layer has a first area facing the sidewall of the groove and a second area further away from the sidewall of the groove than the first area,
wherein the second area and the first area are continuous,
wherein the second area is provided deeper than the first area from a surface side of the third layer toward the first layer,
wherein the silicon carbide semiconductor device includes a source electrode in contact with the second area of the third layer,
wherein the first layer is formed on a first surface of a silicon carbide substrate,
wherein an insulating film is provided within the groove,
wherein a gate electrode is provided on the insulating film,
wherein a drain electrode is provided on a second surface, which is opposite to the first surface, of the silicon carbide substrate,
wherein the source electrode includes Ni, and
wherein the second layer has a surface in direct contact with the third layer, and the surface of the second layer under the second area is provided deeper than the surface of the second layer under the first area by 0.1 μm or more from the surface of the third layer toward the first layer.