IP Library › Granted Patent US 11,417,566
Granted Patent B2
US 11,417,566 · App. 16/382,641 · Granted Aug 16, 2022

Semiconductor device structure with interconnect structure and method for forming the same

Inventors: Chun-Hao Kung (Hsinchu, TW); Chih-Chieh Chang (Zhubei, TW); Kao-Feng Liao (Hsinchu, TW); Hui-Chi Huang (Zhubei, TW); Kei-Wei Chen (Tainan, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
H01L21/76831H01L21/7684H01L21/76814H01L21/76877H01L21/02211H01L21/76843H01L29/66795
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,417,566
App. No.
16/382,641
Granted
Aug 16, 2022
Kind
B2
Abstract

A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.

Claims (63)

1. A method for forming a semiconductor device structure, comprising:

forming an interconnect structure over a substrate, wherein forming the interconnect structure comprises:

forming a first metal layer over the substrate;

forming a dielectric layer over the first metal layer;

forming a trench in the dielectric layer;

performing a surface treatment process to form a hydrophobic layer on a sidewall surface of the dielectric layer;

forming a metal material in the trench and over the hydrophobic layer to form a via structure on the first metal layer; and

performing a planarization process to remove a portion of the metal material out of the trench, wherein performing the planarization process comprises providing a solvent on the metal material, wherein the solvent comprises methanol, ethanol, propanol or a combination thereof, wherein performing the planarization process comprises maintaining a surface temperature of the semiconductor device structure within a range from about 10 degrees Celsius to about 15 degrees Celsius.

2. The method for forming the semiconductor device structure as claimed in claim 1 , wherein performing the surface treatment process comprises:

providing a gas mixture on the sidewall surface of the trench, wherein the gas mixture comprises a silane compound.

3. The method for forming the semiconductor device structure as claimed in claim 2 , wherein the silane compound comprises: trialkoxysilane, dialkoxysilane, monoalkoxy, dipodal silane or a combination thereof.

4. The method for forming the semiconductor device structure as claimed in claim 1 , further comprising:

forming a barrier layer on the hydrophobic layer and in the trench.

5. The method for forming the semiconductor device structure as claimed in claim 1 , wherein the hydrophobic layer has a water contact angle in a range from about 50 degrees to about 180 degrees.

6. The method for forming the semiconductor device structure as claimed in claim 1 , wherein the performing the planarization process comprises a chemical mechanical polishing process.

7. The method of claim 1 , wherein the hydrophobic layer has a water contact angle in a range from about 50 degrees to about 180 degrees.

8. The method of claim 1 , wherein the surface treatment process is operated at a pressure range of about 10 −6 torr to about 10 −8 torr.

9. A method for forming a semiconductor device structure, comprising:

forming a first metal layer over a substrate;

forming a dielectric layer over the first metal layer;

forming a trench in the dielectric layer, the trench being above the first metal layer;

performing a first surface treatment process to form a first hydrophobic layer on a sidewall surface of the dielectric layer;

forming a first metal material in a portion of the trench, wherein the first metal material is formed on the first hydrophobic layer, and the trench is partially filled with the first metal material to form a recess on the first metal material;

after the forming the first metal material, performing a second surface treatment process on the recess to form a second hydrophobic layer on the first hydrophobic layer; and

forming a second metal material on the second hydrophobic layer and the first metal material.

10. The method for forming the semiconductor device structure as claimed in claim 9 , wherein the first surface treatment process comprises using a silane compound, and the silane compound comprises trialkoxysilane, monoalkoxysilane or dipoal silane.

11. The method for forming the semiconductor device structure as claimed in claim 10 , wherein the silane compound has a formula (I):

R—Si—X  (I),

wherein R is an organofunctional group, X is hydrolyzable group, and the organofunctional group is an aromatic functional group, an amino acid functional group or a fluorine functional group.

12. The method for forming the semiconductor device structure as claimed in claim 9 , further comprising:

performing a third surface treatment process on the recess to form a third hydrophobic layer on the second hydrophobic layer; and

forming a third metal material on the third hydrophobic layer and the second metal material.

13. The method for forming the semiconductor device structure as claimed in claim 9 , wherein the first surface treatment process is operated at a pressure in a range from about 10 −6 torr to about 10 −8 torr.

14. The method for forming the semiconductor device structure as claimed in claim 9 , further comprising:

performing a planarization process to remove a portion of the second metal material out of the recess; and

maintaining a surface temperature of the semiconductor device structure within a range from about 10 degrees Celsius to about 15 degrees Celsius during the planarization process.

15. The method for forming the semiconductor device structure as claimed in claim 9 , wherein the first hydrophobic layer has a water contact angle in a range from about 50 degrees to about 180 degrees.

16. A method for forming a semiconductor device structure, comprising:

forming a gate structure over a fin structure;

forming a gate contact structure over the gate structure;

forming a first metal layer over the gate contact structure;

forming a dielectric layer over the first metal layer;

forming a first trench in the dielectric layer;

forming a first hydrophobic layer on a sidewall surface of the first trench;

forming a first metal material in the first trench and over the first hydrophobic layer; and

performing a planarization process to remove a portion of the first metal material out of the trench, wherein the first hydrophobic layer protects the first metal layer from being damaged during the planarization process.

17. The method for forming the semiconductor device structure as claimed in claim 16 , wherein forming the first hydrophobic layer comprises:

providing a gas mixture on the sidewall surface of the first trench, wherein the gas mixture comprises a silane compound and a carrier gas.

18. The method for forming the semiconductor device structure as claimed in claim 17 , wherein the silane compound has a formula (I):

R—Si—X  (I),

wherein R is an organofunctional group, X is hydrolyzable group, and the organofunctional group is aromatic functional group, amino acid functional group or fluorine functional group.

19. The method for forming the semiconductor device structure as claimed in claim 16 , further comprising:

forming a source/drain structure in the fin structure;

forming a source/drain contact structure over the source/drain structure;

forming a source/drain conductive plug structure over the source/drain contact structure;

forming the first metal layer over the source/drain conductive plug;

forming the dielectric layer over the first metal layer;

forming a second trench in the dielectric layer, wherein the second trench is adjacent to the first trench;

forming the first hydrophobic layer in the second trench; and

forming a second via structure over the first hydrophobic layer in the second trench.

20. The method for forming the semiconductor device structure as claimed in claim 16 , further comprising:

forming a second hydrophobic layer on a sidewall surface of the first hydrophobic layer; and

forming a second metal material on the second hydrophobic layer and the first metal material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2019
From: KUNG, CHUN-HAO; CHANG, CHIH-CHIEH; LIAO, KAO-FENG; HUANG, HUI-CHI; CHEN, KEI-WEI
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 048870/0690 →
Continuity (2)
Provisional Application 62712335 · Jul 31, 2018
Related Publication 20200043777A1 · Feb 6, 2020