IP Library Granted Patent US 11,422,921
Granted Patent B2
US 11,422,921 · App. 16/731,787 · Granted Aug 23, 2022

Debug systems for deterministic validation of data storage devices

Inventors: Muthukumar Karuppiah (San Ramon, CA); Rohit Sindhu (San Jose, CA); Dinesh Nalli (Cupertino, CA); Khurram Ismail (Milpitas, CA)
Assignee: Western Digital Technologies, Inc.
G06F11/366G06F3/0619G06F3/0653G06F3/0673
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Quick Facts
Patent No.
US 11,422,921
App. No.
16/731,787
Granted
Aug 23, 2022
Kind
B2
Abstract

Systems and methods are disclosed for deterministically validating an SSD device, based on the occurrence of a triggering firmware event. In some implementations, a method is provided. The method comprising receiving an ID of a triggering firmware event from a computing device and receiving data of a cross feature event from the computing device. A storage device may execute a plurality of NVMe commands as part of a test to generate a plurality of firmware events. An ID of each of the plurality of firmware events is compared to the ID of the triggering firmware event and in response to an ID of one of the plurality of firmware events matching the ID of the triggering firmware event, the one of the plurality of firmware events may be identified as the triggering firmware event and an indication of the match may be generated. At least part of the data of the cross feature event is transmitted to the storage device to cause execution of the cross feature event during execution of the triggering firmware event.

Claims (38)

1. A method comprising:

receiving an ID of a triggering firmware event from a computing device;

receiving data of a cross feature event from the computing device, the computing device transmitting a plurality of NVMe commands to a storage device, and wherein execution of the plurality of NVMe commands by the storage device generates a plurality of firmware events;

comparing an ID of each of the plurality of firmware events to the ID of the triggering firmware event;

in response to an ID of one of the plurality of firmware events matching the ID of the triggering firmware event, identifying the one of the plurality of firmware events as the triggering firmware event and generating an indication of a match; and

in response to the indication of the match, transmitting at least part of the data of the cross feature event to the storage device to cause execution of the cross feature event during execution of the triggering firmware event.

2. The method of claim 1 , wherein the cross feature event is a reset, and data of the reset includes a reset type, reset parameters, and an address of a register on the storage device where at least part of the data of the reset is to be transmitted.

3. The method of claim 2 , wherein transmitting the at least part of the data of the reset comprises transmitting the reset parameters to the register on the storage device.

4. The method of claim 2 , wherein the data of the reset further includes a shmoo delay parameter indicating one or more time periods by which execution of the cross feature event is to be delayed by the storage device during execution of the triggering firmware event.

5. The method of claim 1 , further comprising monitoring artifacts and glitches caused by execution of the cross feature event during the triggering firmware event.

6. The method of claim 1 , wherein the cross feature event is an NVMe command stored in a submission queue of the computing device, and data of the NVMe command includes an address of a doorbell register of the storage device and parameters of the NVMe command.

7. The method of claim 6 , wherein transmitting the at least part of the data of the cross feature event comprises writing the parameters of the NVMe command to the doorbell register of the storage device, to cause the storage device to retrieve the NVMe command from the submission queue of the computing device and execute the NVMe command.

8. The method of claim 1 , wherein the plurality of NVMe commands includes input/output (I/O) commands and administrative commands.

9. The method of claim 1 , wherein the match between the ID of one of the plurality of firmware events and the ID of the triggering firmware event is indicated by a general purpose input/output (GPIO) signal.

10. The method of claim 6 , further comprising monitoring behavior of at least one of the plurality of NVMe commands during execution of the triggering firmware event.

11. An apparatus comprising:

a first interface to communicate with a computing device;

a second interface to communicate with a storage device; and

a processing device to:

receive an ID of a triggering firmware event from the computing device;

receive data of a cross feature event from the computing device, the computing device transmitting a plurality of NVMe commands to the storage device, and wherein execution of the commands by the storage device generates a plurality of firmware events;

compare an ID of each of the plurality of firmware events to the ID of the triggering firmware event;

in response to an ID of one of the plurality of firmware events matching the ID of the triggering firmware event, identify one of the plurality of firmware events as the triggering firmware event and generate an indication of a match; and

in response to the indication of the match, transmit at least part of the data of the cross feature event to the storage device to cause execution of the cross feature event during execution of the triggering firmware event.

12. The apparatus of claim 11 , wherein the cross feature event is a reset, and the data of the reset includes a reset type, reset parameters, and an address of a register on the storage device where at least part of the data of the reset is to be transmitted.

13. The apparatus of claim 12 , wherein to transmit at least part of the data of the reset, the processing device is to write the reset parameters to the register on the storage device.

14. The apparatus of claim 12 , wherein the data of the reset further includes a shmoo delay parameter indicating one or more time periods by which execution of the cross feature event is to be delayed by the storage device during execution of the triggering firmware event.

15. The apparatus of claim 11 , wherein the processing device is further configured to monitor artifacts and glitches caused by execution of the cross feature event during the triggering firmware event.

16. The apparatus of claim 11 , wherein the cross feature event is an NVMe command stored in a submission queue of the computing device, and data of the NVMe command includes an address of a doorbell register of the storage device and parameters of the NVMe command.

17. The apparatus of claim 16 , wherein to transmit at least part of the data of the cross feature event, the processing device is to write the parameters of the NVMe command to the doorbell register of the storage device, to cause the storage device to retrieve the NVMe command from the submission queue of the computing device and execute the NVMe command.

18. The apparatus of claim 11 , wherein the plurality of NVMe commands includes input/output (I/O) commands and administrative commands.

19. The apparatus of claim 11 , wherein to generate the indication of the match, the processing device generates a general purpose input/output (GPIO) signal indicating the match.

20. A non-transitory computer readable medium, having instructions stored thereon that, when executed by a processing device, cause the processing device to:

receive an ID of a triggering firmware event from a computing device;

receive data of a cross feature event from the computing device, the computing device transmitting a plurality of NVMe commands to a storage device, and wherein execution of the plurality of NVMe commands by the storage device generates a plurality of firmware events;

compare an ID of each of the plurality of firmware events to the ID of the triggering firmware event;

in response to an ID of one of the plurality of firmware events matching the ID of the triggering firmware event, identify the one of the plurality of firmware events as the triggering firmware event and generate an indication of a match; and

in response to the indication of the match, transmit at least part of the data of the cross feature event to the storage device to cause execution of the cross feature event during execution of the triggering firmware event.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052025 FRAME 0088 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058965/0699 →
SECURITY INTEREST Recorded Feb 26, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052025/0088 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2020
From: KARUPPIAH, MUTHUKUMAR; SINDHU, ROHIT; NALLI, DINESH; ISMAIL, KHURRAM
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 051408/0505 →