Semiconductor device package and method of manufacturing the same

1. A semiconductor device package comprising:

a main substrate having a first surface and a second surface opposite to the first surface;

at least one thin film transistor (TFT) module disposed adjacent to and electrically connected to the first surface of the main substrate;

at least one first electronic component disposed adjacent to and electrically connected to the first surface of the main substrate;

at least one second electronic component;

at least one encapsulant covering the at least one thin film transistor (TFT) module, the at least one first electronic component and the at least one second electronic component; and

a plurality of light emitting devices electrically connected to the at least one thin film transistor (TFT) module, wherein the at least one first electronic component electrically connects to the at least one thin film transistor (TFT) module through the main substrate;

wherein the at least one first electronic component comprises an active component and the at least one second electronic component comprises a passive component.

2. The semiconductor device package of claim 1 , wherein the at least one thin film transistor (TFT) module includes a plurality of thin film transistor (TFT) modules surrounding the at least one first electronic component.

3. The semiconductor device package of claim 1 , wherein the at least one thin film transistor (TFT) module and the at least one first electronic component are disposed side by side.

4. The semiconductor device package of claim 1 , further comprising a package structure disposed on the first surface of the main substrate, wherein the at least one first electronic component includes at least one first upper electronic component and at least one first lower electronic component, and the package structure includes:

a package substrate having an upper surface and a lower surface opposite to the upper surface;

the at least one first upper electronic component electrically connected to the upper surface of the package substrate;

the at least one first lower electronic component electrically connected to the lower surface of the package substrate; and

at least one interconnection element electrically connecting the package substrate and the main substrate.

5. The semiconductor device package of claim 4 , wherein the package structure further includes:

an upper package body covering the at least one first upper electronic component; and

a lower package body covering the at least one first lower electronic component.

6. The semiconductor device package of claim 1 , wherein the at least one second electronic component is disposed adjacent to and electrically connected to the second surface of the main substrate.

7. The semiconductor device package of claim 1 , wherein each of the light emitting devices is electrically connected to the at least one thin film transistor (TFT) module through a conductive via extending through the at least one encapsulant.

8. The semiconductor device package of claim 7 , wherein the conductive via is electrically connected to the at least one thin film transistor (TFT) module through a connecting material.

9. The semiconductor device package of claim 1 , wherein the at least one encapsulant includes a first encapsulant covering the at least one thin film transistor (TFT) module and a second encapsulant covering the at least one electronic component.

10. The semiconductor device package of claim 9 , wherein each of the light emitting devices is electrically connected to the at least one thin film transistor (TFT) module through a conductive via extending through the first encapsulant.

11. The semiconductor device package of claim 9 , further comprising an upper substrate disposed on the first encapsulant, and the light emitting devices are disposed on the upper substrate.

12. The semiconductor device package of claim 11 , wherein the second encapsulant contacts a lateral side surface of the upper substrate.

13. The semiconductor device package of claim 11 , wherein the upper substrate includes a protrusion protruding from a periphery of an upper surface of the upper substrate.

14. The semiconductor device package of claim 11 , further comprising a protection layer covering the upper substrate, wherein a portion of the protection layer extends to a lateral side surface of the upper substrate.

15. The semiconductor device package of claim 1 , wherein at least a portion of the at least one first electronic component is under at least one of the plurality of the light emitting devices.

16. The semiconductor device package of claim 1 , wherein the at least one thin film transistor (TFT) module includes an insulation layer, a gate, a gate insulator, a semiconductor channel, a drain and a source, wherein the insulation layer contacts the first surface of the main substrate.

17. A semiconductor device package comprising:

a main substrate having a first surface;

at least one thin film transistor (TFT) module disposed adjacent to and electrically connected to the first surface of the main substrate;

at least one first electronic component disposed adjacent to and electrically connected to the first surface of the main substrate through a solder ball;

at least one encapsulant covering the at least one thin film transistor (TFT) module and the at least one first electronic component; and

a plurality of light emitting devices electrically connected to the at least one thin film transistor (TFT) module.

18. A semiconductor device package comprising:

a main substrate having a first surface;

at least one thin film transistor (TFT) module disposed adjacent to and electrically connected to the first surface of the main substrate;

at least one first electronic component disposed adjacent to and electrically connected to the first surface of the main substrate;

at least one encapsulant covering the at least one thin film transistor (TFT) module and the at least one first electronic component;

a plurality of light emitting devices electrically connected to the at least one thin film transistor (TFT) module; and

an upper substrate disposed on the at least one encapsulant and defining a plurality of cavities, wherein each of the light emitting devices is disposed in a respective one of the cavities.

19. The semiconductor device package of claim 18 , further comprising a protection layer covering the upper substrate and the light emitting devices.