IP Library Granted Patent US 11,437,500
Granted Patent B2
US 11,437,500 · App. 17/167,332 · Granted Sep 6, 2022

Semiconductor device and method for fabricating the same

Inventors: Shunpei Yamazaki (Tokyo, JP); Hideomi Suzawa (Kanagawa, JP); Shinya Sasagawa (Kanagawa, JP); Motomu Kurata (Kanagawa, JP); Masashi Tsubuku (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/66969H01L21/02565H01L27/127H01L27/1225H01L27/14616H01L27/14689H01L29/7869H01L29/78696
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Quick Facts
Patent No.
US 11,437,500
App. No.
17/167,332
Granted
Sep 6, 2022
Kind
B2
Abstract

The on-state characteristics of a transistor are improved and thus, a semiconductor device capable of high-speed response and high-speed operation is provided. A highly reliable semiconductor device showing stable electric characteristics is made. The semiconductor device includes a transistor including a first oxide layer; an oxide semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer; a second oxide layer over the oxide semiconductor layer; a gate insulating layer over the second oxide layer; and a gate electrode layer over the gate insulating layer. An end portion of the second oxide layer and an end portion of the gate insulating layer overlap with the source electrode layer and the drain electrode layer.

Claims (48)

1. A semiconductor device comprising:

an oxide semiconductor layer which has an island shape;

a source electrode layer and a drain electrode layer over the oxide semiconductor layer;

an oxide layer over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer;

a gate insulating layer over the oxide layer; and

a gate electrode layer over the gate insulating layer,

wherein a side surface of the oxide layer, a side surface of the gate insulating layer, and a side surface of the gate electrode layer form a continuous surface over the source electrode layer and the drain electrode layer.

2. The semiconductor device according to claim 1 , further comprising a sidewall insulating layer in contact with the side surface of the gate electrode layer.

3. The semiconductor device according to claim 2 , wherein the side surface of the gate insulating layer and a side surface of the sidewall insulating layer form a continuous surface.

4. The semiconductor device according to claim 1 ,

wherein the oxide semiconductor layer comprises indium and zinc, and

wherein the oxide layer comprises indium and zinc.

5. The semiconductor device according to claim 4 ,

wherein each of the oxide semiconductor layer and the oxide layer further comprises gallium, and

wherein a proportion of gallium with respect to indium in the oxide layer is greater than a proportion of gallium with respect to indium in the oxide semiconductor layer.

6. The semiconductor device according to claim 4 ,

wherein a proportion of indium contained in the oxide semiconductor layer is larger than a proportion of indium contained in the oxide layer.

7. The semiconductor device according to claim 1 , wherein each of the oxide semiconductor layer and the oxide layer comprises a crystalline region having c-axis alignment in a direction perpendicular to a surface.

8. The semiconductor device according to claim 1 ,

wherein the oxide semiconductor layer comprises indium and zinc,

wherein the oxide layer comprises indium and zinc, and

wherein a proportion of indium contained in the oxide semiconductor layer is larger than a proportion of indium contained in the oxide layer.

9. A method for fabricating a semiconductor device, comprising:

forming an oxide semiconductor film;

etching the oxide semiconductor film to have an island-shape so that an oxide semiconductor layer is formed;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer;

stacking an oxide film and a gate insulating film over the source electrode layer and the drain electrode layer;

forming a gate electrode layer over the oxide film and the gate insulating film;

etching the oxide film and the gate insulating film to have an island shape using the gate electrode layer as a mask so that an oxide layer and a gate insulating layer are formed; and

forming an oxide insulating layer over the source electrode layer, the drain electrode layer, the oxide layer, the gate insulating layer, and the gate electrode layer,

wherein a side surface of the oxide layer, a side surface of the gate insulating layer, and a side surface of the gate electrode layer form a continuous surface over the source electrode layer and the drain electrode layer.

10. The method for fabricating the semiconductor device according to claim 9 ,

wherein the oxide semiconductor layer comprises indium and zinc, and

wherein the oxide layer comprises indium and zinc.

11. A method for fabricating a semiconductor device, comprising:

forming an oxide semiconductor layer;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer;

stacking an oxide film and a gate insulating film over the source electrode layer and the drain electrode layer;

forming a gate electrode layer over the oxide film and the gate insulating film;

forming an oxide insulating layer over the gate insulating film and the gate electrode layer;

etching the oxide insulating layer to form a sidewall insulating layer in contact with a side surface of the gate electrode layer; and

etching the oxide film and the gate insulating film to have an island shape using the sidewall insulating layer and the gate electrode layer as masks so that an oxide layer and a gate insulating layer are formed,

wherein a side surface of the sidewall insulating layer, a side surface of the gate insulating layer, and a side surface of the oxide layer form a continuous surface over the source electrode layer and the drain electrode layer.

12. The method for fabricating the semiconductor device according to claim 11 ,

wherein the oxide semiconductor layer comprises indium and zinc, and

wherein the oxide layer comprises indium and zinc.

13. The method for fabricating the semiconductor device according to claim 12 ,

wherein the proportion of indium in the oxide semiconductor layer is larger than a proportion of indium in the oxide layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2021
From: YAMAZAKI, SHUNPEI; SUZAWA, HIDEOMI; SASAGAWA, SHINYA; KURATA, MOTOMU; TSUBUKU, MASASHI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 055147/0815 →
Priority Claims (1)
JP 2012-203385 · Sep 14, 2012 · national
Continuity (5)
Continuation 16671612 · Nov 1, 2019
Continuation 16194444 · Nov 19, 2018
Division 15461575 · Mar 17, 2017
Division 14021618 · Sep 9, 2013
Related Publication 20210305413A1 · Sep 30, 2021