IP Library › Granted Patent US 11,450,745
Granted Patent B2
US 11,450,745 · App. 16/782,826 · Granted Sep 20, 2022

Semiconductor device and method for manufacturing the same

Inventors: Tatsuo Shimizu (Shinagawa, JP); Johji Nishio (Machida, JP); Takashi Shinohe (Yokosuka, JP)
Assignee: Kabushiki Kaisha Toshiba
H01L29/1608H01L21/049H01L29/045H01L29/167H01L29/4966H01L29/66068H01L29/7395H01L29/7802H01L29/7813H01L29/7397
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,450,745
App. No.
16/782,826
Granted
Sep 20, 2022
Kind
B2
Abstract

A semiconductor device according to embodiments includes a p-type SiC region, a gate insulating film disposed on the p-type SiC region, and a gate electrode disposed on the gate insulating film and including a p-type impurity and 3C—SiC.

Claims (29)

1. A semiconductor device, comprising:

a p-type SiC region, the p-type SiC region being 4H—SiC;

a gate electrode including a SiC laver and a metal laver disposed on the SiC layer, the SiC layer including a p-type impurity, 3C—SiC, and 4H—SiC; and

a gate insulating film disposed between the p-type SiC region and the gate electrode.

2. The device according to claim 1 , wherein

the gate electrode includes the p-type impurity and the 3C—SiC at least in a region contacting the gate insulating film.

3. The device according to claim 1 , wherein

the p-type impurity is aluminum (Al), gallium (Ga), or indium (In).

4. The device according to claim 1 , wherein

the 3C—SiC is metalized 3C—SiC.

5. The device according to claim 1 , wherein

a volume of the 3C—SiC in the gate electrode is larger than a volume of the 4H—SiC in the gate electrode.

6. The device according to claim 1 , wherein

a ratio of occupation volume of 3C—SiC among all SiC included in the gate electrode is equal to or more than 90%.

7. The device according to claim 1 , wherein

a concentration of the p-type impurity in the gate electrode is equal to or more than 1×10 20 cm −3 .

8. The device according to claim 1 , wherein

a concentration of a p-type impurity in the p-type SIC region is equal to or less than 1×10 18 cm −3 .

9. The device according to claim 1 , wherein

the gate insulating film is a silicon oxide film.

10. A semiconductor device, comprising:

a p-type SiC region, the p-type SiC region being 4H—SiC;

a gate electrode including a p-type impurity, 3C—SiC, and 4H—SiC; and

a gate insulating film disposed between the p-type SiC region and the gate electrode,

wherein the gate electrode is formed under a temperature of equal to or more than 1,000° C. and equal to or less than 1,200° C.

11. The device according to claim 10 , wherein

the gate electrode is formed by a carbonization of a silicon film.

12. The device according to claim 11 , wherein

the carbonization of the silicon film is performed in an atmosphere including at least one of ethane (C 2 H), ethylene (C 2 H 6 ), or acetylene (C 2 H 2 ).

Priority Claims (1)
JP 2015-179037 · Sep 11, 2015 · national
Continuity (2)
Division 15252493 · Aug 31, 2016
Related Publication 20200176571A1 · Jun 4, 2020