Silicon interposer including through-silicon via structures with enhanced overlay tolerance and methods of forming the same

1. A fan-out silicon interposer comprising:

a bridge die including an array of through-silicon via (TSV) structures extending through a silicon substrate, package-side metal pads contacting package-side end surfaces of the array of TSV structures, and a package-side dielectric material layer that laterally surrounds the package-side metal pads;

an encapsulant interposer frame that laterally surrounds the bridge die;

a die-side redistribution structure including die-side bonding pads; and

a package-side redistribution structure located on the package-side metal pads at an opposite side of the die-side redistribution structure relative to the bridge die and contacting the package-side dielectric material layer of the bridge die.

2. The fan-out silicon interposer of claim 1 , wherein each of the package-side metal pads contacts an end surface of a respective one of the TSV structures and has a greater horizontal cross-sectional area than the end surface of the respective one of the TSV structures.

3. The fan-out silicon interposer of claim 1 , wherein the encapsulant interposer frame is an epoxy molding compound (EMC) interposer frame, and wherein a horizontal plane including interfaces between the package-side metal pads and the TSV structures is more proximal to the die-side bonding pads than a horizontal plane including an interface between the EMC interposer frame and the package-side redistribution structure is to the die-side bonding pads.

4. The fan-out silicon interposer of claim 3 , wherein a horizontal plane including interfaces between the package-side metal pads and the package-side redistribution structure is more proximal to the die-side bonding pads than the horizontal plane including the interface between the EMC interposer frame and the package-side redistribution structure is to the die-side bonding pads.

5. The fan-out silicon interposer of claim 1 , wherein the encapsulant interposer frame is an epoxy molding compound (EMC) interposer frame, and wherein the fan-out silicon interposer comprises through-integrated-fan-out via (TIV) structures that vertically extends through the EMC interposer frame and electrically connecting a respective package-side redistribution wire interconnect in the package-side redistribution structure to a respective die-side redistribution wire interconnect in the die-side redistribution structure.

6. The fan-out silicon interposer of claim 5 , wherein a horizontal plane including interfaces between the package-side metal pads and the TSV structures is more proximal to the die-side bonding pads than a horizontal plane including interfaces between the TIV structures and the package-side redistribution structure is to the die-side bonding pads.

7. The fan-out silicon interposer of claim 6 , wherein a horizontal plane including interfaces between the package-side metal pads and the package-side redistribution structure is more proximal to the die-side bonding pads than the horizontal plane including the interfaces between the TIV structures and the package-side redistribution structure is to the die-side bonding pads.

8. The fan-out silicon interposer of claim 5 , further comprising:

die-side metal pads contacting the TSV structures and located between the TSV structures and the die-side bonding pads; and

interfaces between the TIV structures and the die-side redistribution structure are located within a same horizontal plane as interfaces between the die-side metal pads and the die-side redistribution structure.

9. The fan-out silicon interposer of claim 1 , wherein:

each of the TSV structures is laterally surrounded by a respective cylindrical portion of a through-substrate insulating spacer; and

the silicon substrate is vertically spaced from a horizontal plane including interfaces between the package-side metal pads and the TSV structures by a backside insulating layer that laterally surrounds the cylindrical portions of the through-substrate insulating spacer.

10. The fan-out silicon interposer of claim 1 , wherein:

the die-side bonding pads comprises an array of microbumps; and

package-side bonding pads comprising an array of C4 bonding pads, wherein the package-side bonding pads are located on the package-side redistribution structure and are electrically connected to a respective one of the package-side metal pads.

11. The fan-out silicon interposer of claim 1 , wherein the bridge die comprises die-side metal interconnect structures electrically connecting a respective one of the TSV structures and a respective one of the die-side redistribution structures.

12. The fan-out silicon interposer of claim 11 , wherein the die-side metal interconnect structures comprises a combination of metal line structures and metal via structures, or integrated metal line and via structures.

13. A fan-out silicon interposer comprising:

a bridge die including an array of through-silicon via (TSV) structures, package-side metal pads contacting package-side end surfaces of the array of TSV structures, and a package-side dielectric material layer that laterally surrounds the package-side metal pads;

an encapsulant interposer frame that laterally surrounds the bridge die;

through-integrated-fan-out via (TIV) structures that vertically extends through the EMC interposer frame;

a package-side redistribution structure located on the package-side metal pads and contacting the package-side dielectric material layer of the bridge die; and

a die-side redistribution structure electrically connected to the array of TSV structures and including die-side bonding pads.

14. The fan-out silicon interposer of claim 13 , wherein interfaces between the TIV structures and the package-side redistribution structure are vertically offset from interfaces between the package-side metal pads and the package-side redistribution structure.

15. A method of forming a chip package structure, comprising:

forming via structures through an upper portion of a silicon substrate;

forming die-side metal interconnect structures over the via structures;

forming an array of through-silicon via (TSV) structures by thinning a backside the silicon substrate, wherein the via structures vertically extend through an entire thickness of the thinned silicon substrate to become the array of TSV structures;

forming package-side metal pads laterally surrounded by a package-side dielectric layer on backside surfaces of the array of TSV structures, whereby a bridge die is formed;

disposing the bridge die over a carrier substrate;

forming an encapsulant interposer frame around the bridge die and over the carrier substrate;

forming a die-side redistribution structure over the bridge die and the encapsulant interposer frame;

attaching at least one semiconductor die to the die-side redistribution structure; and

forming a package-side redistribution structure comprising package-side redistribution dielectric layers over the package-side metal pads directly on the package-side dielectric material layer.

16. The method of claim 15 , wherein each of the package-side metal pads is formed directly on an end surface of a respective one of the TSV structures and has a greater horizontal cross-sectional area than the end surface of the respective one of the TSV structures.

17. The method of claim 15 , further comprising

removing the carrier substrate from an assembly comprising the bridge die, the die-side redistribution structure, and the at least one semiconductor die.

18. The method of claim 17 , wherein:

the die-side metal interconnect structures comprise die-side metal pads at a topmost level;

the bridge die is attached to the carrier substrate by providing a die attach film between the carrier substrate and the bridge die; and

removing the die attach film after attaching the at least one semiconductor die to the die-side redistribution structure.

19. The method of claim 18 , wherein:

the encapsulant interposer frame is an epoxy molding compound (EMC) interposer frame;

the package-side redistribution structure is formed directly on the EMC interposer frame and the package-side metal pads; and

a horizontal plane including interfaces between the package-side metal pads and the package-side redistribution structure is recessed toward the at least one semiconductor die relative to a horizontal plane including the interface between the EMC interposer frame and the package-side redistribution structure by a thickness of the die-attach film.

20. The method of claim 17 , further comprising attaching a structure including the assembly and the package-side redistribution structure to a package substrate using an array of C4 solder balls.