Method of manufacturing a semiconductor device using a thermally decomposable layer, a semiconductor manufacturing apparatus, and the semiconductor device

1. A method of manufacturing a semiconductor device, the method comprising:

forming an etch target layer on a substrate;

forming thermally decomposable patterns spaced apart from each other on the etch target layer;

forming a first mask pattern covering sidewalls of the thermally decomposable patterns; and

removing the thermally decomposable patterns by a heating method to expose a sidewall of the first mask pattern; and

patterning the etch target layer based on the exposed first mask pattern.

2. The method of claim 1 , wherein the forming the first mask pattern fills a space between the thermally decomposable patterns and covers top surfaces of the thermally decomposable patterns; and

the method further comprising, removing an upper portion of the first mask pattern after the removing of the thermally decomposable patterns.

3. The method of claim 2 , wherein the forming the first mask pattern comprises:

coating the thermally decomposable patterns with a spin-on-hardmask (SOH) composite; and

baking the SOH composite,

wherein the heating method for removing the thermally decomposable patterns includes the baking of the SOH composite.

4. The method of claim 1 , further comprising:

forming a second mask layer on the etch target layer before the forming the thermally decomposable patterns,

wherein the removing the thermally decomposable patterns comprises exposing a top surface of the second mask layer.

5. The method of claim 4 , further comprising:

etching the second mask layer using the first mask pattern as a first etch mask to form a second mask pattern; and

etching the etch target layer using the second mask pattern as a second etch mask.

6. The method of claim 1 , wherein the forming the first mask pattern comprises:

forming a first mask layer conformally covering the thermally decomposable patterns; and

performing an anisotropic etching process on the first mask layer,

wherein a width of an upper portion of the first mask pattern is less than a width of a lower portion of the first mask pattern.

7. The method of claim 1 , wherein the forming the thermally decomposable patterns comprises:

forming a thermally decomposable layer by reacting a first monomer and a second monomer on the etch target layer;

forming second mask patterns on the thermally decomposable layer; and

etching the thermally decomposable layer using the second mask patterns as etch masks.

8. A method of manufacturing a semiconductor device, the method comprising:

forming conductive patterns spaced apart from each other on a substrate;

forming a thermally decomposable layer filling a space between the conductive patterns and covering the conductive patterns;

forming a thermally decomposable pattern by removing an upper portion of the thermally decomposable layer, the thermally decomposable pattern partially filling the space between the conductive patterns and exposing upper sidewalls of the conductive patterns;

conformally forming a first capping layer covering the conductive patterns and the thermally decomposable pattern;

removing the thermally decomposable pattern to form a first gap region exposing lower sidewalls of the conductive patterns; and

forming a second capping layer on the first capping layer.

9. The method of claim 8 , wherein the first capping layer is thinner than the second capping layer.

10. The method of claim 8 , further comprising:

removing the first and second capping layers on the conductive patterns to expose top surfaces of the conductive patterns; and

forming upper conductive patterns in contact with the conductive patterns.

11. The method of claim 8 , before the forming the conductive patterns, further comprising:

forming word lines extending in a first direction and parallel to each other in the substrate;

forming first dopant regions and second dopant regions, which are spaced apart from each other, in the substrate between the word lines;

forming bit lines, which are electrically connected to the first dopant regions and extend in a second direction intersecting the first direction, on the substrate; and

forming bit line contacts between the bit lines to electrically connect the second dopant regions to the conductive patterns.

12. The method of claim 11 , further comprising:

forming bit line capping patterns on the bit lines, before the forming the bit line contacts;

forming a diffusion barrier layer covering the bit line capping patterns and top surfaces of the bit line contacts, after the forming the bit line contacts and before the forming the conductive patterns; and

removing the diffusion barrier layer not overlapping with the conductive patterns after the forming the conductive patterns and before the forming the thermally decomposable pattern,

wherein the removing of the diffusion barrier layer comprises exposing portions of bottom surfaces the conductive patterns on the bit line capping patterns.

13. The method of claim 11 , further comprising:

forming bit line spacers covering sidewalls of the bit lines and including a sacrificial spacer before the forming the conductive patterns; and

exposing an upper portion of the sacrificial spacer after the forming the conductive patterns and before the forming the thermally decomposable pattern.

14. The method of claim 13 , further comprising:

removing the sacrificial spacer to form a second gap region before the forming the thermally decomposable pattern,

wherein a top end of the second gap region is closed in the forming the thermally decomposable pattern, and

wherein the first gap region and the second gap region are connected to each other in the removing the thermally decomposable pattern to form the first gap region.

15. The method of claim 13 , wherein

the sacrificial spacer includes a thermally decomposable material,

the thermally decomposable pattern is in contact with the sacrificial spacer in the forming the thermally decomposable pattern, and

the sacrificial spacer is simultaneously removed when the thermally decomposable pattern is removed.

16. The method of claim 8 , wherein the forming of the thermally decomposable layer comprises:

reacting a first monomer and a second monomer with each other to form a polymer,

wherein the removing the upper portion of the thermally decomposable layer is performed by a first annealing process, and

wherein the removing the thermally decomposable pattern is performed by a second annealing process.

17. The method of claim 8 , wherein

the removing the thermally decomposable pattern is performed at a first temperature; and

the forming of the first capping layer is performed at a second temperature,

the second temperature is lower than the first temperature.

18. The method of claim 8 , wherein

the removing the thermally decomposable pattern is performed at a first temperature; and

the forming of the thermally decomposable layer is performed at a second temperature,

the second temperature is lower than the first temperature.

19. The method of claim 8 , wherein

the removing the thermally decomposable pattern is performed at a first temperature; and

the removing of the thermally decomposable pattern is performed at a second temperature,

the second temperature is higher than the first temperature.

20. The method of claim 8 , wherein a porosity of the first capping layer is greater than a porosity of the second capping layer.