IP Library › Granted Patent US 11,493,705
Granted Patent B2
US 11,493,705 · App. 17/232,557 · Granted Nov 8, 2022

Connection structure of optical waveguide chips

Inventors: Kota Shikama (Tokyo, JP); Hiroshi Ishikawa (Tokyo, JP); Yuko Kawajiri (Tokyo, JP); Atsushi Aratake (Tokyo, JP)
Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
G02B6/4231G02B6/24G02B6/36G02B6/3636G02B6/3648G02B6/4219G02B6/125G02B6/12019G02B6/26
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Quick Facts
Patent No.
US 11,493,705
App. No.
17/232,557
Granted
Nov 8, 2022
Kind
B2
Abstract

A connection structure of optical waveguide chips includes a base substrate ( 2003 ) in which grooves ( 2013 ) are formed, spacer optical fibers ( 2006 ) each disposed for a corresponding one of the grooves ( 2013 ) and fitted in the groove ( 2013 ) while partially projecting from the base substrate ( 2003 ), and silica-based PLCs ( 2001, 2002 ) that are a plurality of optical waveguide chips in each of which grooves ( 2007 ) fitted on the projecting portions of the spacer optical fibers ( 2006 ) are formed at positions of an optical waveguide layer ( 2008 ) facing the grooves ( 2013 ), and each of which is mounted on the base substrate ( 2003 ) while being supported by the spacer optical fibers ( 2006 ). The silica-based PLCs ( 2001, 2002 ) are mounted on the base substrate ( 2003 ) such that incident/exit end faces of the optical waveguide layers ( 2008 ) face each other.

Claims (7)

1. A connection structure of optical waveguide chips, comprising:

a base substrate in which a plurality of first grooves are formed;

a plurality of first spacer members respectively fitted in the plurality of first grooves while partially projecting from the base substrate; and

a plurality of optical waveguide chips in each of which an optical waveguide layer is formed on a substrate, and second grooves fitted on the projecting portions of the first spacer members are formed at positions of the optical waveguide layer facing the first grooves, and each of which is mounted on the base substrate while being supported by the first spacer members,

wherein the plurality of optical waveguide chips are mounted on the base substrate such that incident/exit end faces of optical waveguide layers of two adjacent optical waveguide chips face each other,

wherein each of two adjacent optical waveguide chips further comprises a pitch conversion portion configured to make an interval between cores in the incident/exit end face of an optical waveguide array formed in the optical waveguide layer narrower than an interval between cores in a portion far apart from the incident/exit end face, and

wherein each optical waveguide chip has a shape with a notch in at least one of corner portions of the incident/exit end face facing the other adjacent optical waveguide chip.

Priority Claims (4)
JP 2017-112436 · Jun 7, 2017 · national
JP 2017-117442 · Jun 15, 2017 · national
JP 2017-119304 · Jun 19, 2017 · national
JP 2017-228660 · Nov 29, 2017 · national
Continuity (2)
Continuation 16619911
Related Publication 20210231887A1 · Jul 29, 2021
Cited By (5)
US 12,204,155 US 12,300,974 US 12,326,603 US 12,426,139 US 12,651,885