Memory system and control method thereof
A memory system includes a non-volatile memory, and a controller configured to issue a first command requesting a first operation to the non-volatile memory and a second command to the non-volatile memory. The second command may be for requesting a duration time of the first operation or for requesting an execution stage of the first operation. In accordance with the information returned by the non-volatile memory in response to the second command, the controller issues a third command requesting a completion status of the first operation to the non-volatile memory. The first operation may be a data read operation, a data write operation, or a data erase operation.
1. A memory system comprising:
a non-volatile memory; and
a controller configured to issue a first command requesting a first operation to the non-volatile memory and a second command requesting the non-volatile memory to transmit a duration time for executing the first operation to the non-volatile memory.
2. The memory system according to claim 1 , wherein the controller is configured to issue the second command when the non-volatile memory is executing the first operation.
3. The memory system according to claim 1 , wherein the non-volatile memory is configured to determine the duration time in accordance with a progress of the first operation at a time when the non-volatile memory receives the second command.
4. The memory system according to claim 1 , wherein the controller is further configured to, upon lapse of the duration time after the issuance of the second command, issue to the non-volatile memory a third command requesting a completion status of the first operation.
5. The memory system according to claim 1 , wherein the controller is further configured to not issue to the non-volatile memory a third command requesting a completion status of the first operation at any time after the second command is issued and before the lapse of the duration time thereafter.
6. The memory system according to claim 1 , wherein the first operation is one of a data read operation, a data write operation, and a data erase operation.
7. The memory system according to claim 1 , wherein
the non-volatile memory includes a storage area in which information necessary for calculating the duration time of the first operation is stored, and is configured to calculate the duration time from the information stored in the storage area.
8. A memory system comprising:
a non-volatile memory; and
a controller configured to issue a first command requesting a first operation to the non-volatile memory, issue a second command requesting the non-volatile memory to transmit information indicating an execution stage of the first operation to the non-volatile memory, and set an issuance interval of a third command requesting the non-volatile memory to transmit a completion status of the first operation, according to the execution stage of the first operation.
9. The memory system according to claim 8 , wherein the controller is configured to issue the second command when the non-volatile memory is executing the first operation.
10. The memory system according to claim 8 , wherein the first operation is one of a data write operation and a data erase operation.
11. The memory system according to claim 10 , wherein the execution stage of the first operation includes a first step of executing a process requested by the first command, and a second step of verifying the completion of the first operation.
12. The memory system according to claim 11 , wherein
when the execution stage of the first operation is at the first step, the controller issues the third command at a first issuance interval, and
when the execution stage of the first operation is at the second step, the controller issues the third command at a second issuance interval shorter than the first issuance interval.
13. The memory system according to claim 12 , wherein
the first operation is a data write operation, and
the non-volatile memory performs a voltage apply operation for writing data in the first step, and performs a verification operation to verify whether the data has been written in the second step.
14. The memory system according to claim 12 , wherein
the first operation is a data erase operation, and
the non-volatile memory performs a voltage apply operation for erasing data in the first step, and performs a verification operation to verify whether the data has been erased in the second step.
15. A method of controlling a non-volatile memory, the method comprising:
issuing a first command requesting a first operation to the non-volatile memory; and
issuing a second command requesting the non-volatile memory to transmit a duration time for executing the first operation the non-volatile memory.
16. The method according to claim 15 , wherein the information that is returned includes an execution stage of the first operation.
17. The method according to claim 15 , further comprising:
upon receiving a non-completion status in response to the third command, the non-completion status indicating that the non-volatile memory has not completed the first operation, updating information stored in the non-volatile memory based on which the timing information is derived.
18. The method according to claim 15 , wherein the first operation is one of a data read operation, a data write operation, and a data erase operation.
19. The method according to claim 15 , wherein the second command is issued when the non-volatile memory is executing the first operation.
20. The method according to claim 15 , further comprising:
issuing a third command at a timing determined based on the duration time.