IP Library › Granted Patent US 11,502,205
Granted Patent B2
US 11,502,205 · App. 17/008,368 · Granted Nov 15, 2022

Semiconductor device having Schottky barrier diode

Inventors: Yoichi Hori (Himeji Hyogo, JP); Masakazu Kobayashi (Himeji Hyogo, JP)
Assignees: KABUSHIKI KAISHA TOSHIBA; TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
H01L29/872H01L29/063H01L29/1608H01L29/868
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Quick Facts
Patent No.
US 11,502,205
App. No.
17/008,368
Granted
Nov 15, 2022
Kind
B2
Abstract

A semiconductor device according to an embodiment includes first and second electrode, and semiconductor layer between the first and the second electrode. The semiconductor layer has first and second plane. The semiconductor layer includes first region of first conductivity type, second region of second conductivity type between the first plane and the first region, third region of second conductivity type between the first plane and the first region and, fourth region of second conductivity type between the second and the third region, and fifth region of first conductivity type having first portion provided between the first and the fourth region. Width of the fourth region is larger than that of the second region. Distance between the second region and the first portion is smaller than distance between the second and the fourth region. And width of the first portion is smaller than that of the fourth region.

Claims (25)

1. A semiconductor device comprising:

a first electrode;

a second electrode; and

a semiconductor layer provided between the first electrode and the second electrode, the semiconductor layer having a first plane in contact with the first electrode and a second plane in contact with the second electrode, the semiconductor layer including:

a first semiconductor region of a first conductivity type in contact with the first electrode;

a second semiconductor region of a second conductivity type provided between the first plane and the first semiconductor region, the second semiconductor region extending in a first direction parallel to the first plane and in contact with the first electrode;

a third semiconductor region of the second conductivity type provided between the first plane and the first semiconductor region, the third semiconductor region extending in the first direction and in contact with the first electrode;

a fourth semiconductor region of the second conductivity type provided between the first plane and the first semiconductor region, the fourth semiconductor region interposed between the second semiconductor region and the third semiconductor region and the fourth semiconductor region being electrically connected to the first electrode; and

a fifth semiconductor region of the first conductivity type provided between the first semiconductor region and the fourth semiconductor region, a first conductivity type impurity concentration of the fifth semiconductor region being higher than a first conductivity type impurity concentration of the first semiconductor region, the fifth semiconductor region including a first portion that is separated from the first electrode,

wherein a first width of the fourth semiconductor region in a second direction parallel to the first plane and perpendicular to the first direction is larger than a second width of the second semiconductor region in the second direction,

wherein a first distance between the second semiconductor region and the first portion in the second direction is smaller than a second distance between the second semiconductor region and the fourth semiconductor region in the second direction, and

wherein a third width of the first portion in the second direction is smaller than the first width.

2. The semiconductor device according to claim 1 , wherein the fifth semiconductor region further includes a second portion, the first semiconductor region is interposed between the first portion and the second portion, and

wherein a third distance between the third semiconductor region and the second portion in the second direction is smaller than a fourth distance between the third semiconductor region and the fourth semiconductor region in the second direction.

3. The semiconductor device according to claim 2 , wherein a shape of the fifth semiconductor region viewed from a third direction perpendicular to the first plane is an annular shape.

4. The semiconductor device according to claim 2 , further comprising a metal semiconductor compound layer provided between the fourth semiconductor region and the first electrode,

wherein a fifth distance between the first portion and the second portion in the second direction is larger than a fourth width of the metal semiconductor compound layer in the second direction.

5. The semiconductor device according to claim 1 , wherein a sixth distance between the first portion and the first plane is smaller than a depth of the fourth semiconductor region with respect to the first plane as a reference.

6. The semiconductor device according to claim 1 , wherein the semiconductor layer further includes a sixth semiconductor region of the second conductivity type provided between the first plane and the first semiconductor region, the sixth semiconductor region extending in the first direction, the sixth semiconductor region being in contact with the first electrode, and the second semiconductor region being interposed between the fourth semiconductor region and the sixth semiconductor region.

7. The semiconductor device according to claim 6 , wherein the second distance is smaller than a seventh distance between the sixth semiconductor region and the second semiconductor region.

8. The semiconductor device according to claim 1 , wherein the semiconductor layer further includes:

a seventh semiconductor region provided between the first plane and the first semiconductor region and surrounding the second semiconductor region, the third semiconductor region, and the fourth semiconductor region; and

an eighth semiconductor region provided between the first semiconductor region and the seventh semiconductor region and surrounding the second semiconductor region, the third semiconductor region, and the fourth semiconductor region, a first conductivity type impurity concentration of the eighth semiconductor region being higher than the first conductivity type impurity concentration of the first semiconductor region, and

wherein the first conductivity type impurity concentration of the fifth semiconductor region is lower than the first conductivity type impurity concentration of the eighth semiconductor region.

9. The semiconductor device according to claim 1 , wherein the semiconductor layer is a silicon carbide layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2020
From: HORI, YOICHI; KOBAYASHI, MASAKAZU
To: KABUSHIKI KAISHA TOSHIBA; TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
Reel/Frame 054411/0731 →
Priority Claims (1)
JP JP2020-052531 · Mar 24, 2020 · national
Continuity (1)
Related Publication 20210305435A1 · Sep 30, 2021
Cited By (1)
US 12,622,040