IP Library › Granted Patent US 11,563,940
Granted Patent B2
US 11,563,940 · App. 17/490,637 · Granted Jan 24, 2023

Encoder, decoder, and related non-transitory computer readable medium

Inventors: Ryuichi Kanoh (Osaka, JP); Takahiro Nishi (Nara, JP); Tadamasa Toma (Osaka, JP)
Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
H04N19/117H04N19/103H04N19/176H04N19/182
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Quick Facts
Patent No.
US 11,563,940
App. No.
17/490,637
Granted
Jan 24, 2023
Kind
B2
Abstract

Various embodiments provide a decoder configured to select a filter based on a block size of a first block and a block size of a second block in an image, and change values of pixels in the first block and the second block. The filter includes a first set of multipliers and a first set of offsets for the first block, and a second set of multipliers and a second set of offsets for the second block. The values of the pixels in the first block and the second block are changed by performing multiplication with each multiplier in the first set of multipliers, by performing multiplication with each multiplier in the second set of multipliers, and by using the first set of offsets and the second set of offsets.

Claims (21)

1. A decoder comprising:

processing circuitry; and

a memory coupled to the processing circuitry,

wherein the processing circuitry is configured to:

select a filter based on a block size of a first block and a block size of a second block in an image, the filter including a first set of multipliers and a first set of offsets for the first block, and a second set of multipliers and a second set of offsets for the second block; and

change values of pixels in the first block and the second block, by performing multiplication with each multiplier in the first set of multipliers, by performing multiplication with each multiplier in the second set of multipliers, and by using the first set of offsets and the second set of offsets, the pixels in the first block and the second block being arranged along a straight line across a boundary between the first block and the second block,

wherein the first set of multipliers and the second set of multipliers are asymmetrical with respect to the boundary, and

wherein the first set of offsets and the second set of offsets are symmetric with respect to the boundary.

2. An encoder comprising:

processing circuitry; and

a memory coupled to the processing circuitry,

wherein the processing circuitry is configured to:

select a filter based on a block size of a first block and a block size of a second block in an image, the filter including a first set of multipliers and a first set of offsets for the first block, and a second set of multipliers and a second set of offsets for the second block; and

change values of pixels in the first block and the second block, by performing multiplication with each multiplier in the first set of multipliers, by performing multiplication with each multiplier in the second set of multipliers, and by using the first set of offsets and the second set of offsets, the pixels in the first block and the second block being arranged along a straight line across a boundary between the first block and the second block,

wherein the first set of multipliers and the second set of multipliers are asymmetrical with respect to the boundary, and

wherein the first set of offsets and the second set of offsets are symmetric with respect to the boundary.

3. A non-transitory computer readable medium storing a bitstream, the bitstream comprising filter information that causes a decoder to execute a filtering process, the filtering process comprising:

selecting a filter based on a block size of a first block and a block size of a second block in an image, the filter including a first set of multipliers and a first set of offsets for the first block, and a second set of multipliers and a second set of offsets for the second block; and

changing values of pixels in the first block and the second block, by performing multiplication with each multiplier in the first set of multipliers, by performing multiplication with each multiplier in the second set of multipliers, and by using the first set of offsets and the second set of offsets, the pixels in the first block and the second block being arranged along a straight line across a boundary between the first block and the second block,

wherein the first set of multipliers and the second set of multipliers are asymmetrical with respect to the boundary, and

wherein the first set of offsets and the second set of offsets are symmetric with respect to the boundary.

Priority Claims (1)
JP 2017-106947 · May 30, 2017 · national
Continuity (4)
Continuation 16590773 · Oct 2, 2019
Continuation PCTJP2018014358 · Apr 4, 2018
Provisional Application 62482359 · Apr 6, 2017
Related Publication 20220021877A1 · Jan 20, 2022
Cited By (1)
US 12,513,293