IP Library › Granted Patent US 11,569,188
Granted Patent B2
US 11,569,188 · App. 17/387,755 · Granted Jan 31, 2023

Semiconductor device including elongated bonding structure between the substrate

Inventors: Chung-Hsing Kuo (Taipei, TW); Chun-Ting Yeh (Taipei, TW); Ming-Tse Lin (Hsinchu, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L24/06H01L21/681
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Quick Facts
Patent No.
US 11,569,188
App. No.
17/387,755
Granted
Jan 31, 2023
Kind
B2
Abstract

A semiconductor device, including a first semiconductor substrate and a second semiconductor substrate, is provided. A first bonding structure is located on the first semiconductor substrate and includes a first pad having an elongated shape. A second bonding structure is located on the second semiconductor substrate and includes a second pad having an elongated shape. The first semiconductor substrate is bonded to the second semiconductor substrate by bonding the first bonding structure and the second bonding structure. The first pad is bonded to the second pad, and an extension direction of the first pad is different from an extension direction of the second pad.

Claims (26)

1. A semiconductor device, comprising:

a first semiconductor substrate;

a first bonding structure, located on the first semiconductor substrate, wherein the first bonding structure comprises a first pad having an elongated shape;

a second semiconductor substrate; and

a second bonding structure, located on the second semiconductor substrate, wherein the second bonding structure comprises a second pad having an elongated shape,

wherein the first semiconductor substrate is bonded to the second semiconductor substrate by bonding the first bonding structure and the second bonding structure, the first pad is bonded to the second pad, and an extension direction of the first pad is different from an extension direction of the second pad,

wherein the first semiconductor substrate comprises a first conductive wire, the second semiconductor substrate comprises a second conductive wire,

the first conductive wire is connected the first pad, and the second conductive wire is connected to the second pad, and

in a top view, the first conductive wire encloses the first pad, and the second conductive wire encloses the second pad.

2. The semiconductor device according to claim 1 , wherein the first pad and the second pad are each respectively a rectangle, a rounded rectangle, an oblong, or a parallelogram.

3. The semiconductor device according to claim 1 , wherein the extension direction of the first pad and the extension direction of the second pad are perpendicular to each other.

4. The semiconductor device according to claim 1 , wherein the extension direction of the first pad and the extension direction of the second pad form an acute angle in-between.

5. The semiconductor device according to claim 1 , wherein a ratio of a length to a width of the first pad is same as a ratio of a length to a width of the second pad.

6. The semiconductor device according to claim 5 , wherein the width of the first pad is same as the width of the second pad.

7. The semiconductor device according to claim 5 , wherein the width of the first pad is different from the width of the second pad.

8. The semiconductor device according to claim 1 , wherein a ratio of a length to a width of the first pad is different from a ratio of a length to a width of the second pad.

9. The semiconductor device according to claim 8 , wherein the width of the first pad is same as the width of the second pad, or the length of the first pad is same as the length of the second pad.

10. The semiconductor device according to claim 8 , wherein the width of the first pad is different from the width of the second pad, and the length of the first pad is different from the length of the second pad.

11. The semiconductor device according to claim 1 , wherein an overlapping region of the first pad and the second pad is a square, a rectangle, or a parallelogram.

12. The semiconductor device according to claim 1 , wherein an area of an overlapping region of the first pad and the second pad is smaller than a sum of areas of non-overlapping regions of the first pad that do not overlap the second pad.

13. The semiconductor device according to claim 12 , wherein the area of the overlapping region of the second pad and the first pad is smaller than a sum of areas of non-overlapping regions of the second pad that do not overlap the first pad.

14. The semiconductor device according to claim 1 , wherein the first pad and the second pad form a “cross” shape or an “X” shape after bonding.

15. The semiconductor device according to claim 1 , wherein the first semiconductor substrate further comprises a first conductive wire, the second semiconductor substrate further comprises a second conductive wire, the extension direction of the first pad is same as an extension direction of the first conductive wire and the first pad is connected to the first conductive wire, and the extension direction of the second pad is same as an extension direction of the second conductive wire and the second pad is connected to the second conductive wire.

16. The semiconductor device according to claim 15 , wherein a width of the first pad is less than or equal to a width of the first conductive wire.

17. The semiconductor device according to claim 15 , wherein a width of the second pad is less than or equal to a width of the second conductive wire.

18. The semiconductor device according to claim 15 , wherein the first pad completely overlaps or partially overlaps the first conductive wire, and the second pad completely overlaps or partially overlaps the second conductive wire.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 28, 2021
From: KUO, CHUNG-HSING; YEH, CHUN-TING; LIN, MING-TSE
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 057010/0152 →
Priority Claims (1)
CN 202110696592.5 · Jun 23, 2021 · national
Continuity (1)
Related Publication 20220415836A1 · Dec 29, 2022