Moisture seal for photonic devices
The present disclosure relates to semiconductor structures and, more particularly, to a moisture seal for photonic devices and methods of manufacture. The structure includes: a first trench in at least one substrate material; a guard ring structure with an opening and which at least partially surrounds the first trench; and a second trench at a dicing edge of the substrate, the second trench being lined on sidewalls with barrier material and spacer material over the barrier material.
1. A structure, comprising:
a first trench in at least one substrate material;
a guard ring structure with an opening and which at least partially surrounds the first trench; and
a second trench at a dicing edge of the at least one substrate material, the second trench being lined on sidewalls with a barrier material and spacer material over the barrier material,
wherein the spacer material and the barrier material are moisture seal materials which line outer sidewalls of the first trench and the outer sidewalls of the second trench to prevent moisture ingress passing through an opening of the guard ring structure.
2. The structure of claim 1 , wherein the barrier material is composed of alumina or nitride.
3. The structure of claim 1 , wherein the spacer material is composed of oxide material.
4. The structure of claim 1 , wherein the first trench intersects with the second trench, the first trench and the second trench includes the barrier material and the spacer material, and low density tetraethyl orthosilicate (TEOS) is provided over the spacer material.
5. The structure of claim 4 , wherein the low density TEOS completely fills remaining portions of the second trench and partially fills the first trench.
6. The structure of claim 1 , wherein the first trench is wider than the second trench.
7. The structure of claim 1 , wherein the first trench and the second trench extend through one or more layers of insulator material.
8. The structure of claim 1 , wherein the barrier material is composed of nitride or oxide on the outer sidewalls of the first trench and the second trench and the spacer material is composed of oxide directly on the barrier material.
9. The structure of claim 1 , wherein the first trench intersects with the second trench at the dicing edge of the at least one substrate material.
10. The structure of claim 9 , wherein the guard ring structure comprises a metal material that extends about an active region of a chip, and the chip includes a waveguide structure.
11. The structure of claim 10 , wherein the first trench comprises a V-groove profile.
12. The structure of claim 11 , wherein the waveguide structure comprises SiGe on an oxide layer.
13. A structure, comprising:
a groove formed within one or more layers of material and which extends from a perimeter of a chip;
a trench around the perimeter of a chip;
at least a first moisture barrier material lining sidewalls of the trench; and
a spacer material lining the first moisture barrier material; and
a material filling remaining portions of the trench, which is directly in contact with the spacer material,
wherein the first moisture barrier material and the spacer material line outer sidewalls of the groove and the outer sidewalls of the trench to prevent moisture ingress from reaching an opening in a guard ring structure extending about the groove.
14. The structure of claim 13 , wherein the first moisture barrier material is alumina or nitride.
15. The structure of claim 14 , wherein the spacer material is an oxide.
16. The structure of claim 15 , further comprising a low density oxide over the spacer material, which fills remaining portions of the trench and partially fills the groove.
17. The structure of claim 13 , wherein the first moisture barrier material is nitride or alumina or oxide.
18. The structure of claim 17 , wherein the groove is wider than the trench.