IP Library › Granted Patent US 11,587,910
Granted Patent B2
US 11,587,910 · App. 17/223,292 · Granted Feb 21, 2023

Stacked semiconductor structure and method

Inventors: Szu-Ying Chen (Toufen Township, TW); Meng-Hsun Wan (Taipei, TW); Dun-Nian Yaung (Taipei, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H01L25/0657H01L24/03H01L24/05H01L24/06H01L24/08H01L24/80H01L25/50H01L2224/033H01L2224/03019H01L2224/0384H01L2224/03452H01L2224/03462H01L2224/03464H01L2224/03616H01L2224/03848H01L2224/04105H01L2224/05184H01L2224/05546H01L2224/05624H01L2224/05639H01L2224/05647H01L2224/05666H01L2224/06181H01L2224/08058H01L2224/08145H01L2224/8083H01L2224/80357H01L2224/80895H01L2224/80896H01L2224/80948H01L2224/80986H01L2224/9202H01L2225/06548H01L2924/01029H01L2924/01074
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Quick Facts
Patent No.
US 11,587,910
App. No.
17/223,292
Filed
Apr 6, 2021
Granted
Feb 21, 2023
Kind
B2
Art Unit
2898
USPC
257/770
Abstract

A device comprises a first chip comprising a first connection pad embedded in a first dielectric layer and a first bonding pad embedded in the first dielectric layer, wherein the first bonding pad comprises a first portion and a second portion, the second portion being in contact with the first connection pad and a second chip comprising a second bonding pad embedded in a second dielectric layer of the second chip, wherein the first chip and the second chip are face-to-face bonded together through the first bonding pad the second bonding pad.

Claims (52)

1. A device comprising:

a first chip comprising:

a first substrate;

a first insulating layer;

a first interconnect structure interposed between the first insulating layer and the first substrate;

a first aluminum connection pad embedded in the first insulating layer; and

a first copper bonding pad embedded in the first insulating layer, wherein the first aluminum connection pad directly contacts the first copper bonding pad; and

a second chip comprising:

a second substrate;

a second interconnect structure;

a second insulating layer, the second interconnect structure being interposed between the second insulating layer and the second substrate; and

a second copper bonding pad embedded in the second insulating layer of the second chip, wherein the first chip and the second chip are face-to-face bonded together through the first copper bonding pad and the second copper bonding pad, wherein the first copper bonding pad and the second copper bonding pad comprise a single homogenous copper layer.

2. The device of claim 1 , further comprising an external connection pad contacting the second interconnect structure, wherein the second interconnect structure is interposed between the external connection pad and the first chip.

3. The device of claim 1 , wherein a width of the first copper bonding pad is different than a width of the second copper bonding pad.

4. The device of claim 1 , wherein a width of at least a portion of the first aluminum connection pad is different than a width of the first copper bonding pad.

5. The device of claim 1 , wherein the first chip and the second chip are attached to a printed circuit board.

6. The device of claim 1 , wherein the first insulating layer comprises a first sub-layer and a second sub-layer, wherein the first sub-layer has a surface level with an interface between the first aluminum connection pad and the first copper bonding pad.

7. A device comprising:

a first structure comprising:

a first substrate;

a first insulating layer;

a first interconnect structure interposed between the first insulating layer and the first substrate; and

a first aluminum connection pad embedded in the first insulating layer; and

a second structure comprising:

a second substrate;

a second interconnect structure; and

a second insulating layer, the second interconnect structure being interposed between the second insulating layer and the second substrate, the second insulating layer being directly bonded to the first insulating layer; and

a first copper bonding feature extending from the first aluminum connection pad to the second interconnect structure.

8. The device of claim 7 , wherein the first substrate and the second substrate each comprise active circuits, wherein the first substrate and the second substrate are bonded in a face-to-face configuration.

9. The device of claim 7 , wherein at least a portion of the first aluminum connection pad is different than a width of the first copper bonding feature.

10. The device of claim 7 , further comprising an external connection pad contacting the second interconnect structure, wherein the second interconnect structure is interposed between the external connection pad and the first structure.

11. The device of claim 10 , wherein an upper surface of the external connection pad is lower than an upper surface of the second substrate.

12. The device of claim 7 , wherein the first insulating layer contacts a horizontal surface and a vertical surface of the first aluminum connection pad.

13. The device of claim 7 , further comprising a second copper bonding feature contacting the first aluminum connection pad.

14. The device of claim 7 , further comprising a printed circuit board, wherein the first structure and the second structure are mounted on a printed circuit board.

15. A device comprising:

a first substrate including

a first insulating layer,

a first conductive layer in the first insulating layer,

a first metal layer in the first insulating layer, and

a second metal layer provided between the first metal layer and the first conductive layer, wherein the second metal layer is an aluminum metal layer, wherein the first metal layer is a first copper metal layer; and

a second substrate being in contact with the first substrate, the second substrate including:

a second insulating layer directly bonded to the first insulating layer, and

a third metal layer provided in the second insulating layer, the third metal layer being in physical contact with the first metal layer, wherein the third metal layer is a second copper metal layer, wherein the first insulating layer and the second insulating layer directly contacts the third metal layer.

16. The device of claim 15 , wherein the first metal layer and the third metal layer form a homogenous layer.

17. The device of claim 15 , wherein the second substrate further comprises:

a semiconductor substrate;

an interconnect structure interposed between the semiconductor substrate and the second insulating layer; and

an external connection pad contacting the interconnect structure, wherein the interconnect structure is interposed between the external connection pad and the first insulating layer.

18. The device of claim 15 , wherein the first substrate and the second substrate are bonded face-to-face.

19. The device of claim 15 , wherein a width of the first metal layer is different than a width of the third metal layer.

20. The device of claim 15 , wherein the second substrate further includes a fourth metal layer, wherein the fourth metal layer is a second aluminum metal layer.

Continuity (6)
Continuation 16679598 · Nov 11, 2019
Continuation 16221734 · Dec 17, 2018
Continuation 15657630 · Jul 24, 2017
Continuation 15018490 · Feb 8, 2016
Division 14250024 · Apr 10, 2014
Related Publication 20210225813A1 · Jul 22, 2021