IP Library › Granted Patent US 11,646,701
Granted Patent B2
US 11,646,701 · App. 17/176,103 · Granted May 9, 2023

Power amplifier output power protection

Inventors: David Steven Ripley (Marion, IA); Joshua James Caron (Madison, NC); Vinay Kundur (San Jose, CA); Wei Zhang (Oak Park, CA)
Assignee: Skyworks Solutions, Inc.
H03F1/52H03F1/0211H03F3/213H03F2200/387H03F2200/426H03F2200/451
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Quick Facts
Patent No.
US 11,646,701
App. No.
17/176,103
Granted
May 9, 2023
Kind
B2
Abstract

A power amplification system comprises a current source configured to provide a bias current, a current mirror configured to mirror the bias current, and a comparator configured to compare the mirrored bias current to a threshold current and, in response to the mirrored bias current exceeding the threshold current, cause a reduction of output power.

Claims (37)

1. A power amplification system comprising:

a current source configured to provide a bias current;

a current mirror configured to mirror the bias current; and

a comparator configured to compare the mirrored bias current to a threshold current and, in response to the mirrored bias current exceeding the threshold current, cause a reduction of output power;

wherein the current mirror includes a first current mirror providing a 50:1 current ratio, a second current mirror providing a 2:1 current ratio, and a third current mirror providing a 2:1 current ratio.

2. The power amplification system of claim 1 wherein the bias current represents an average current received at the power amplification system.

3. The power amplification system of claim 1 wherein the threshold current is temperature-compensated to correct for current gain variation.

4. A power amplification system comprising:

a current source configured to provide a bias current;

a current mirror configured to mirror the bias current; and

a comparator configured to compare the mirrored bias current to a threshold current and, in response to the mirrored bias current exceeding the threshold current, cause a reduction of output power;

wherein the current source is configured to trim a value of the threshold current independently for each band of the power amplification system.

5. The power amplification system of claim 1 further comprising a capacitor configured to integrate error current from the comparator, the capacitor configured to build charge in response to the mirrored bias current exceeding the threshold current.

6. The power amplification system of claim 5 wherein the capacitor is configured to reset when there is a mode change.

7. The power amplification system of claim 5 further comprising an edge counter.

8. The power amplification system of claim 7 wherein each of the comparator, the edge counter, and the capacitor are integrated on a first circuit die.

9. The power amplification system of claim 1 wherein the current source provides the bias current to an output stage of the power amplification system.

10. A method of managing output power in a power amplifier, the method comprising:

increasing output power;

comparing a mirrored bias current to a threshold current; and

in response to the mirrored bias current exceeding the threshold current, reducing the output power;

wherein the mirrored bias current is generated by applying a bias current to a current mirror having a first current mirror providing a 50:1 current ratio, a second current mirror providing a 2:1 current ratio, and a third current mirror providing a 2:1 current ratio.

11. The method of claim 10 wherein the output power is increased during a calibration process.

12. The method of claim 10 further comprising, in response to the mirrored bias current exceeding the threshold current, reducing a bias current to cause a reduction of the output power.

13. The method of claim 10 further comprising integrating error current to build a charge on capacitor in response to the mirrored bias current exceeding the threshold current.

14. The method of claim 13 wherein the capacitor is configured to reset when there is a mode change.

15. A circuit die comprising:

a current source configured to provide a bias current;

a current mirror configured to mirror the bias current; and

a comparator configured to compare the mirrored bias current to a threshold current and, in response to the mirrored bias current exceeding the threshold current, cause a reduction of output power;

wherein the current mirror includes a first current mirror providing a 50:1 current ratio, a second current mirror providing a 2:1 current ratio, and a third current mirror providing a 2:1 current ratio.

16. A circuit die comprising:

a current source configured to provide a bias current;

a current mirror configured to mirror the bias current; and

a comparator configured to compare the mirrored bias current to a threshold current and, in response to the mirrored bias current exceeding the threshold current, cause a reduction of output power;

wherein the bias current represents an average current at the circuit die.

17. The circuit die of claim 15 wherein the threshold current is temperature-compensated to correct for current gain variation.

Continuity (3)
Continuation 16586711 · Sep 27, 2019
Provisional Application 62738928 · Sep 28, 2018
Related Publication 20210281223A1 · Sep 9, 2021
Cited By (2)
US 12,456,963 US 12,597,890