IP Library › Granted Patent US 11,652,062
Granted Patent B2
US 11,652,062 · App. 16/706,563 · Granted May 16, 2023

Chip embedded integrated voltage regulator

Inventor: Parviz Parto (Laguna Niguel, CA)
Assignee: Faraday Semi, Inc.
H01L23/5389G06F1/3287H01L21/4853H01L21/4857H01L23/49822H01L23/5383H01L23/5385H01L23/645H01L24/19H01L24/20H01L28/10H02M3/158H02M3/1584H01L2224/04105H01L2224/16227H01L2224/214H01L2224/73267H01L2924/00014H01L2924/1033H01L2924/10253H01L2924/13091H01L2924/1427H01L2924/15192H01L2924/15311H01L2924/19041H01L2924/19042H01L2924/19104H02M1/007H02M1/08H05K2201/10378
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Quick Facts
Patent No.
US 11,652,062
App. No.
16/706,563
Granted
May 16, 2023
Kind
B2
Abstract

One or more chip-embedded integrated voltage regulators (“CEIVR's”) are configured to provide power to a circuit or chip such as a CPU or GPU and meet power delivery specifications. The CEIVR's, circuit or chip, and power delivery pathways can be included within the same package. The CEIVR's can be separate from the circuit or chip.

Claims (20)

1. A system for delivering electrical power, the system comprising:

a power converter configured to receive electrical power having a first voltage and to modify the electrical power to provide electrical power having a second voltage lower than the first voltage;

a processor package configured to receive the electrical power having the second voltage from the power converter, the processor package comprising:

an interposer;

a computer processor mounted onto the interposer; and

a plurality of chip-embedded voltage regulators on the interposer, wherein the plurality of chip-embedded voltage regulators are coupled in parallel and are electrically coupled to the computer processor through the interposer, and wherein each of the plurality of chip-embedded voltage regulators comprises:

chip-embedded circuitry including a plurality of power switches configured to modify electrical power; and

an inductor coupled to the chip-embedded circuitry, wherein a footprint of the inductor at least partially overlaps a footprint of the chip-embedded circuitry;

wherein the plurality of chip-embedded voltage regulators on the interposer are configured to modify the electrical power received by the processor package to provide electrical power having a third voltage lower than the second voltage; and

wherein the plurality of chip-embedded voltage regulators are coupled through the interposer to the computer processor to deliver the electrical power having the third voltage to the computer processor.

2. The system of claim 1 , wherein the third voltage is about 0.4 V to about 1 V.

3. The system of claim 2 , wherein the second voltage is about 1 V to about 4 V.

4. The system of claim 1 , wherein the inductor is a thin film inductor.

5. The system of claim 1 , wherein the inductor is embedded with the chip-embedded circuitry.

6. The system of claim 1 , wherein the chip-embedded circuitry comprises:

a pulse width modulator (PWM) controller configured to generate one or more PWM signals; and

a driver configured to generate one or more driver signals based at least in part on the one or more PWM signals, wherein the plurality of power switches are driven by the one or more driver signals.

7. The system of claim 1 , wherein the chip-embedded circuitry is embedded in a substrate of the interposer.

8. The system of claim 1 , wherein the chip-embedded circuitry is embedded in a printed circuit board (PCB) between an upper PCB part and a lower PCB part.

9. The system of claim 8 , wherein the PCB is mounted onto the interposer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 5, 2023
From: PARTO, PARVIZ
To: FARADAY SEMI, INC.
Reel/Frame 063231/0925 →
Continuity (2)
Continuation 16279814 · Feb 19, 2019
Related Publication 20200350255A1 · Nov 5, 2020
Cited By (5)
US 12,199,046 US 12,300,679 US 12,334,421 US 12,395,093 US 12,401,261