IP Library › Granted Patent US 11,682,629
Granted Patent B2
US 11,682,629 · App. 17/315,372 · Granted Jun 20, 2023

Package structure and manufacturing method thereof

Inventors: Kai-Chiang Wu (Hsinchu, TW); Chen-Hua Yu (Hsinchu, TW); Kuo-Chung Yee (Taoyuan, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L23/5389H01L21/486H01L21/4853H01L21/4857H01L21/4875H01L21/4889H01L21/561H01L21/565H01L21/6835H01L23/3114H01L23/3135H01L23/3675H01L23/49833H01L23/49838H01L23/5383H01L23/5384H01L23/5386H01L23/66H01L24/19H01L24/20H01Q1/2283H01L23/3128H01L23/49822H01L23/49827H01L24/29H01L24/32H01L24/73H01L24/92H01L2221/68345H01L2221/68359H01L2223/6677H01L2224/04105H01L2224/12105H01L2224/19H01L2224/214H01L2224/2919H01L2224/32225H01L2224/73267H01L2224/92244H01L2924/141H01L2924/143H01L2924/1421H01L2924/1431H01L2924/1434H01Q1/243
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Quick Facts
Patent No.
US 11,682,629
App. No.
17/315,372
Granted
Jun 20, 2023
Kind
B2
Abstract

A package structure and the method thereof are provided. The package structure includes a conductive plate, a semiconductor die, a molding compound, and antenna elements. The conductive plate has a first surface, a second surface and a sidewall connecting the first surface and the second surface. The semiconductor die is located on the second surface of the conductive plate. The molding compound laterally encapsulates the semiconductor die and covers the sidewall and a portion of the second surface exposed by the semiconductor die, wherein the first surface of the conductive plate is coplanar with a surface of the molding compound. The antenna elements are located over the first surface of the conductive plate.

Claims (52)

1. A package structure, comprising:

a metal layer, having a first surface and a second surface opposite to the first surface;

a semiconductor die, located on the second surface of the metal layer;

an encapsulant, laterally encapsulating the semiconductor die;

antenna elements, located over the first surface of the metal layer; and

conductive pillars, disposed on and electrically connected to the semiconductor die, wherein the conductive pillars are spaced apart from the metal layer.

2. The package structure of claim 1 , further comprising:

through interlayer vias, located on the second surface of the metal layer and molded in the encapsulant;

a first redistribution circuit structure, located on the second surface of the metal layer and the encapsulant, wherein the semiconductor die and the through interlayer vias are located between the metal layer and the first redistribution circuit structure;

conductive elements, located on the first redistribution circuit structure, wherein the first redistribution circuit structure is located between the conductive elements and the encapsulant; and

an additional encapsulant, located between the metal layer and the antenna elements, wherein along a stacking direction of the semiconductor die and the metal layer, a distance between the additional encapsulant and the metal layer is substantially equal to a distance between the additional encapsulant and the encapsulant.

3. The package structure of claim 1 , further comprising:

a connecting film, located between the semiconductor die and the metal layer, wherein a sidewall of the connecting film extending from the semiconductor die to the metal layer is covered by the encapsulant, and the connecting film is made of a thermally conductive and electrically conductive material or is made of a thermally conductive and electrically isolated material.

4. The package structure of claim 3 , wherein the connecting film and the encapsulant are located between the semiconductor die and the metal layer.

5. The package structure of claim 4 , wherein the connecting film and the encapsulant are in contact with the semiconductor die and the metal layer.

6. The package structure of claim 1 , further comprising:

a second redistribution circuit structure, located on the first surface of the metal layer, wherein the second redistribution circuit structure is located between the antenna elements and the metal layer.

7. The package structure of claim 1 , wherein the metal layer comprises a conductive plate having an opening.

8. The package structure of claim 1 , wherein the metal layer comprises:

a solid metal plate having first openings and a plurality of metal lines, wherein the solid metal plate is separated from each of the plurality of metal lines through second openings;

a plurality of metal lines;

a solid metal plate or a solid metal plate having slits arranged in a cross-form; or

a plurality of metal blocks interconnected with a plurality of metal strips.

9. The package structure of claim 1 , wherein the antenna elements are electrically coupled to the metal layer.

10. A package structure, comprising:

a semiconductor die, molded in an encapsulant and having an active surface and a backside surface opposite to the active surface;

a metal layer, located on the backside surface of the semiconductor die, wherein the metal layer has a first surface and a second surface opposite to the first surface, the second surface of the metal layer is covered by the encapsulant and disposed with the semiconductor die, and the first surface of the metal layer is free from the encapsulant, wherein the first surface of the metal layer is coplanar with a third surface of the encapsulant;

a first redistribution circuit structure, located on and electrically connected to the semiconductor die, the semiconductor die being located between the metal layer and the first redistribution circuit structure;

conductive terminals, located on and electrically connected to the first redistribution circuit structure, wherein the first redistribution circuit structure is located between the conductive terminals and the semiconductor die; and

antenna elements, located over the first surface of the metal layer, wherein the metal layer is located between the semiconductor die and the antenna elements, and the antenna elements are electrically connected to the metal layer in a manner of electrical coupling.

11. The package structure as claimed in claim 10 , further comprising:

a connecting film, located between the backside surface of the semiconductor die and the second surface of the metal layer, wherein the connecting film physically contacts the semiconductor die, the encapsulant and the metal layer,

wherein different surfaces of the connecting film are respectively in contact with the semiconductor die, the encapsulant and the metal layer, and

wherein the metal layer and the semiconductor die are thermally coupled, and the connecting film is made of a thermally conductive and electrically conductive material or is made of a thermally conductive and electrically isolated material.

12. The package structure as claimed in claim 11 , wherein an area of the metal layer is greater than an area of the semiconductor die in a vertical projection on the connecting film along a stacking direction of the semiconductor die, the connecting film and the metal layer.

13. The package structure as claimed in claim 10 , further comprising:

a second redistribution circuit structure, located between and electrically connected to the antenna elements and the semiconductor die, wherein the metal layer is a part of the second redistribution circuit structure.

14. The package structure as claimed in claim 10 , wherein the metal layer comprises a solid metal plate having first openings and a plurality of metal lines, wherein the solid metal plate is separated from each of the plurality of metal lines through second openings.

15. The package structure as claimed in claim 10 , wherein the metal layer comprises a plurality of metal lines.

16. The package structure as claimed in claim 10 , wherein the metal layer comprises a solid metal plate or a solid metal plate having slits arranged in a cross-form.

17. The package structure as claimed in claim 10 , wherein the metal layer comprises a plurality of metal blocks interconnected with a plurality of metal strips.

18. A manufacturing method of a package structure, comprising:

forming a metal layer having a first surface and a second surface opposite to the first surface;

disposing a semiconductor die over the second surface of the metal layer;

molding the semiconductor die in an encapsulant, the second surface of the metal layer being covered by the encapsulant, the first surface of the metal layer being free from the encapsulant, and the first surface of the metal layer being coplanar with a third surface of the encapsulant;

forming a first redistribution circuit structure over the semiconductor die and a fourth surface of the encapsulant, the fourth surface being opposite to the third surface, and the semiconductor die being located between the metal layer and the first redistribution circuit structure;

disposing conductive terminals on the first redistribution circuit structure, the first redistribution circuit structure being located between and electrically connected to the conductive terminals and the semiconductor die; and

forming antenna elements over the semiconductor die and the third surface of the encapsulant, the metal layer being located between the semiconductor die and the antenna elements, and the antenna elements being electrically connected to the metal layer in a manner of electrical coupling.

19. The manufacturing method of claim 18 , prior to disposing the semiconductor die over the second surface of the metal layer, further comprising:

forming a connecting film on a backside surface of the semiconductor die,

wherein disposing the semiconductor die over the second surface of the metal layer comprises adhering the connecting film on the second surface of the metal layer to attach the semiconductor die onto the metal layer, the connecting film being located between and thermally coupled to the metal layer and the semiconductor die.

20. The manufacturing method of claim 18 , wherein forming the metal layer comprises forming a second redistribution circuit structure, the second redistribution layer being located between and electrically connected to the antenna elements and the semiconductor die, and the metal layer being a part of the second redistribution circuit structure.

Continuity (5)
Continuation 16891076 · Jun 3, 2020
Continuation 16578403 · Sep 23, 2019
Continuation 15696192 · Sep 6, 2017
Provisional Application 62537442 · Jul 26, 2017
Related Publication 20210265276A1 · Aug 26, 2021