Patterning material including silicon-containing layer and method for semiconductor device fabrication

1. A method for lithography patterning, comprising:

providing a substrate;

forming a target layer over the substrate;

depositing a masking layer over the target layer; and

forming a patterning layer over the masking layer, wherein the forming the patterning layer, includes:

using atomic layer deposition (ALD) process to deposit a first layer having an organic composition;

continuing the ALD process to deposit a second layer including over 50 atomic percent of silicon, wherein the depositing the first layer and the depositing the second layer are performed in-situ, and

during the ALD process, delivering precursors to the substrate to form a continuous variation in a carbon (C) to silicon (Si) ratio in the first layer and the second layer; and

depositing a photosensitive layer on the second layer.

2. The method of claim 1 , wherein the target layer is an interlayer dielectric (ILD) layer formed over the substrate.

3. The method of claim 2 , further comprising:

patterning the photosensitive layer to form a patterned photosensitive layer, wherein the patterning defines a metallization layer to be formed in the ILD layer; and

recessing an upper surface of the second layer to form a curvilinear upper surface extending between regions of the patterned photosensitive layer.

4. The method of claim 3 , further comprising:

after recessing the upper surface of the second layer, etching the second layer to form tapered sidewalls of the second layer extending to an upper surface of the first layer, wherein the recessing the upper surface is performed using a descum process and the etching the second layer is performed using a plasma etching.

5. The method of claim 4 , further comprising:

after etching the second layer, etching the first layer using the second layer having tapered sidewalls as an etching mask.

6. The method of claim 5 , further comprising: during the etching the first layer reducing a thickness of the second layer such that after the etching the first layer, a portion of the second layer remains on a top surface of the etched first layer.

7. The method of claim 1 , wherein the depositing the photosensitive layer is performed by spin-on coating; and wherein the depositing the masking layer includes depositing a lower masking layer of an oxide, depositing a metal hard mask material over the oxide, and depositing an upper masking layer of an oxide over the metal hard mask material.

8. The method of claim 1 , wherein the depositing the second layer includes forming an amorphous silicon (a-Si) layer.

9. The method of claim 8 , wherein the amorphous silicon layer is hydrogenated a-Si.

10. The method of claim 1 , wherein the depositing the first layer includes depositing amorphous carbon.

11. The method of claim 1 , further comprising:

depositing an adhesion layer between the second layer and the photosensitive layer.

12. A method for lithography patterning, comprising:

depositing an organic bottom layer over a masking layer disposed over a target layer;

forming a silicon-containing layer over the organic bottom layer using a deposition process providing of precursors delivered toward a surface of the organic bottom layer and chemically modifying the precursors to obtain the silicon-containing layer on the surface, wherein the silicon-containing layer has at least 50% silicon;

forming a resist layer over the silicon-containing layer;

exposing a portion of the resist layer to a radiation to provide a patterned resist layer wherein the patterned resist layer includes a first opening exposing an upper surface of the silicon-containing layer;

performing a descum process to decrease a height of the patterned resist layer and etch the upper surface of the silicon-containing layer to form a curvilinear surface extending a width of the first opening;

after performing the descum process, performing a first etching process of the silicon-containing layer to form a masking feature having tapered sidewalls and exposing an upper surface of the organic bottom layer, the masking feature having tapered sidewalls defining a second opening having a width less than the first opening;

after the first etching process, performing a second etching process etching a portion of the organic bottom layer uncovered in the second opening to reduce a height of the silicon-containing layer; and

using the patterned bottom organic layer to define a pattern in the masking layer.

13. The method of claim 12 , further comprising: trimming the patterned bottom organic layer prior to using the patterned bottom organic layer to define the pattern.

14. The method of claim 12 , wherein the etching the portion of the organic bottom layer includes removing the patterned resist layer, wherein during the using the patterned bottom organic layer to define the pattern in the target layer a top surface of the patterned silicon-containing layer is free from the patterned resist layer.

15. The method of claim 12 , wherein the top surface of a lower portion of the silicon-containing layer after the descum process and prior to the first etching process is a curvilinear surface.

16. A method of patterning a semiconductor device, the method comprising:

depositing a carbon-containing layer over a masking layer disposed over a substrate;

depositing an amorphous silicon layer directly on the carbon-containing layer;

spin coating a photosensitive layer over the amorphous silicon layer; and

using a lithography process, patterning the photosensitive layer to provide a first opening and a first masking element of the photosensitive layer adjacent the opening;

performing a descum process to decrease a height of the first masking element, form a rounded top surface of the first masking element, and form curvilinear upper surface of the amorphous silicon layer under the first opening of the photosensitive layer;

after performing the descum process, performing a first etching process etching through the amorphous silicon layer through the first opening to taper sidewalls of the amorphous silicon layer, the first etching process stopping at an upper surface of the carbon-containing layer;

using the etched amorphous silicon layer having tapered sidewalls as a masking element during a second etching process etching the deposited carbon-containing layer, the second etching process etching through the deposited carbon-containing layer stopping at an upper surface of the masking layer and reducing a thickness of the amorphous silicon layer, wherein during the etching of the deposited carbon containing layer the amorphous silicon layer.

17. The method of claim 16 , wherein the depositing the amorphous silicon layer and the depositing the carbon-containing layer is performed at room temperature.

18. The method of claim 16 , during the etching the amorphous silicon layer introducing atoms from an etching gas into the amorphous silicon layer to form a transformed silicon layer.

19. The method of claim 16 , wherein after the second etching process etching a portion of the amorphous silicon layer remains on the carbon-containing layer.

20. The method of claim 19 , wherein after the second etching process a first thickness of the amorphous silicon layer remains and a second thickness of the carbon-containing layer remains, wherein a ratio of the first thickness to the second thickness is between 2:1 and 10:1.