IP Library Granted Patent US 11,715,752
Granted Patent B2
US 11,715,752 · App. 17/398,532 · Granted Aug 1, 2023

Semiconductor device and method for production of semiconductor device

Inventor: Atsushi Okuyama (Kanagawa, JP)
Assignee: SONY GROUP CORPORATION
H01L27/14636H01L21/76804H01L23/53238H01L24/06H01L24/09H01L24/94H01L25/50H01L27/14634H01L21/76831H01L21/76898H01L23/53214H01L23/53228H01L2224/0558H01L2224/0568H01L2224/05547H01L2224/05562H01L2224/05564H01L2224/05609H01L2224/05611H01L2224/05624H01L2224/05639H01L2224/05644H01L2224/05655H01L2224/05657H01L2224/05666H01L2224/05681H01L2224/05684H01L2224/0903H01L2224/095H01L2224/80357H01L2224/80895H01L2224/80896H01L2225/06513H01L2924/01002H01L2924/01004H01L2924/0105H01L2924/01005H01L2924/01006H01L2924/01013H01L2924/01014H01L2924/01018H01L2924/01022H01L2924/01023H01L2924/01027H01L2924/01028H01L2924/01029H01L2924/01033H01L2924/01042H01L2924/01047H01L2924/01049H01L2924/01073H01L2924/01074H01L2924/01079H01L2924/01082H01L2924/04953
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Quick Facts
Patent No.
US 11,715,752
App. No.
17/398,532
Granted
Aug 1, 2023
Kind
B2
Abstract

A semiconductor device with a connection pad in a substrate, the connection pad having an exposed surface made of a metallic material that diffuses less readily into a dielectric layer than does a metal of a wiring layer connected thereto.

Claims (30)

1. A semiconductor device, comprising:

a first semiconductor substrate; and

a first wiring layer formed on the first semiconductor substrate, wherein:

the first wiring layer includes a first pad, a first insulating film, and a diffusion preventing layer,

the first pad and the diffusion preventing layer comprise at least a section of a first surface of the first wiring layer, and

a surface of the first pad contacts the diffusion preventing layer and the first insulating film.

2. The semiconductor device of claim 1 , wherein a first portion of the diffusion preventing layer contacts a second insulating film, and wherein the second insulating film is included in a second wiring layer of a second semiconductor layer.

3. The semiconductor device of claim 2 , wherein a second portion of the diffusion preventing layer forms a surface opposite to the first surface of the first wiring layer and contacts the first insulating film.

4. The semiconductor device of claim 3 , wherein the surface of the first pad extends in a direction perpendicular to the first surface of the first wiring layer.

5. The semiconductor device of claim 1 , wherein the diffusion preventing layer includes at least one of Si, N, O, and C.

6. The semiconductor device of claim 1 , wherein the diffusion preventing layer includes one of SiN and SiOC.

7. The semiconductor device of claim 1 , further comprising a barrier metal.

8. The semiconductor device of claim 7 , wherein the barrier metal extends in a direction perpendicular to the first surface of the wiring layer.

9. The semiconductor device of claim 7 , wherein the barrier metal extends in a direction parallel to the first surface of the wiring layer.

10. The semiconductor device of claim 7 , wherein the barrier metal includes at least one of Ti, N, and Ta.

11. The semiconductor device of claim 10 , wherein the barrier metal includes one of TiN and TaN.

12. The semiconductor device of claim 7 , wherein a portion of the barrier metal contacts the first pad.

13. The semiconductor device of claim 7 , wherein the first pad is partially covered by the barrier metal.

14. The semiconductor device of claim 1 , wherein a surface of a second pad of a second semiconductor substrate is exposed through the diffusion preventing layer.

15. The semiconductor device of claim 1 , wherein the diffusion preventing layer prevents metal of the first pad from diffusing into a dielectric film of a second wiring layer of a second semiconductor substrate.

16. The semiconductor device of claim 1 , wherein the first pad includes at least one of Cu, Au, Ag, Al, Ta, Ti, W, Sn, Mo, Ni, In, Co and an alloy of any of Cu, Au, Ag, Al, Ta, Ti, W, Sn, Mo, Ni, In, and Co.

17. The semiconductor device of claim 1 , wherein a width of a second pad of a second semiconductor in a direction parallel to the first surface of the first wiring layer is greater than a width of the first pad in the direction parallel to the first surface of the wiring layer.

18. The semiconductor device of claim 1 , wherein a width of a second pad of a second semiconductor in a direction parallel to the first surface of the first wiring layer is equal to a width of the first pad in the direction parallel to the first surface of the wiring layer.

19. The semiconductor device of claim 1 , wherein a first portion of the diffusion preventing layer is disposed between the first insulating film and a second insulating film.

20. A semiconductor device, comprising:

an imaging device comprising a first semiconductor substrate; and

a first wiring layer formed on the first semiconductor substrate, wherein:

the first wiring layer includes a first pad, a first insulating film, and a diffusion preventing layer,

the first pad and the diffusion preventing layer comprise at least a section of a first surface of the first wiring layer, and

a surface of the first pad contacts the diffusion preventing layer and the first insulating film.

Assignments (2)
CHANGE OF NAME Recorded Sep 17, 2021
From: SONY CORPORATION
To: SONY GROUP CORPORATION
Reel/Frame 057538/0224 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 7, 2021
From: OKUYAMA, ATSUSHI
To: SONY CORPORATION
Reel/Frame 057399/0448 →
Priority Claims (1)
JP 2009-193324 · Aug 24, 2009 · national
Continuity (8)
Continuation 16714137 · Dec 13, 2019
Continuation 15921441 · Mar 14, 2018
Continuation 15619156 · Jun 9, 2017
Continuation 14992865 · Jan 11, 2016
Continuation 14270104 · May 5, 2014
Continuation 13758775 · Feb 4, 2013
Continuation 12858052 · Aug 17, 2010
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