Methods for automated hardware system synthesis
View Patent ↗Described is a method comprising a processing, an establishing, and/or a determining. In the processing, an inputted capabilities list including one or more hardware design capabilities may be processed. In the establishing, one or more candidate components for the one or more hardware design capabilities may be established. In the determining, a set of unique candidate netlists capable of satisfying the one or more hardware design capabilities may be determined, the set of unique candidate netlists being based upon the set of candidate components.
1. A method comprising:
identifying a first set of possible combinations of a first communication protocol based components associated with one or more candidate components, wherein identifying the first set of possible combinations of the first communication protocol based components, results in a first identified set of possible combinations of the first communication protocol based components;
identifying a second set of possible combinations of a second communication protocol based components associated with the one or more candidate components, wherein identifying the second set of possible combinations of the second communication protocol based components, results in a second identified set of possible combinations of the second communication protocol based components; and
generating a set of unique systems by performing a cross-product of the first identified set of possible combinations and the second identified set of possible combinations.
2. The method of claim 1 , wherein the first communication protocol comprises I2C.
3. The method of claim 1 , wherein the second communication protocol comprises SPI.
4. The method of claim 1 , further comprising:
updating a counter parameter based on performing the cross-product; and
comparing the counter parameter with a number of one or more candidate components, wherein the number of one or more candidate components indicates a size of a list of the one or more candidate components.
5. The method of claim 4 , wherein the first identified set of possible combinations of the first communication protocol based components are first slave components, wherein the second identified set of possible combinations of the second communication protocol based components are second slave components, wherein the one or more candidate components include a first master component of the first slave components, and/or wherein the one or more candidate components include a second master component of the second slave components.
6. The method of claim 4 comprising:
receiving system information with one or more desired capabilities of a system; and
generating the list of the one or more candidate components that meet the one or more desired capabilities.
7. The method of claim 6 , wherein the one or more desired capabilities include one or more of:
a type of system,
a number and/or type of sensors of the system,
communication protocols used by the system,
a desired microprocessor for the system,
desired voltage supplies for the system,
desired clocking parameters for the system,
desired power supply support for the system,
power targets for the system,
a delivery schedule impact for the system,
a lab verification impact for the system,
a product implementation history for the system, or
cost, size, and/or user component preferences for the system.
8. The method of claim 6 comprising:
determining whether the first communication protocol and/or the second communication protocol are to be supported for the one or more desired capabilities.
9. The method of claim 8 , wherein identifying the first set of possible combinations of the first communication protocol based components, and identifying the second set of possible combinations of the second communication protocol based components, are based on determining whether the first communication protocol and/or the second communication protocol are to be supported for the one or more desired capabilities.
10. The method of claim 6 comprising:
determining a set of unique candidate netlists capable of satisfying the one or more desired capabilities, the set of unique candidate netlists being based upon the one or more candidate components.
11. The method of claim 10 , comprising:
sending one or more systems that satisfy the one or more desired capabilities to a rule checker if the counter parameter is greater than the number of one or more candidate components.
12. The method of claim 11 , wherein the rule checker includes one or more of: DRC, ERC, thermal rule checker, power rule checker, timing checker, or noise checker.
13. The method of claim 1 , wherein the one or more candidate components are interconnected via a programmable silicon interposer.
14. The method of claim 13 , wherein the programmable silicon interposer includes at least one integrated circuit.
15. A machine-readable storage media having machine-readable instructions stored there on, that when executed, cause one or more machines to perform a method comprising:
identifying a first set of possible combinations of a first communication protocol based components associated with one or more candidate components, wherein identifying the first set of possible combinations of the first communication protocol based components, results in a first identified set of possible combination of the first communication protocol based components;
identifying a second set of possible combinations of a second communication protocol based components associated with the one or more candidate components, wherein identifying the second set of possible combinations of the second communication protocol based components, results in a second identified set of possible combinations of the second communication protocol based components; and
generating a set of unique systems by performing a cross-product of the first identified set and the second identified set.
16. The machine-readable storage media of claim 15 , wherein the first communication protocol comprises I2C.
17. The machine-readable storage media of claim 15 , wherein the second communication protocol comprises SPI.
18. The machine-readable storage media of claim 15 , wherein the method further comprising:
updating a counter parameter based on performing the cross-product; and
comparing the counter parameter with a number of one or more candidate components, wherein the number of one or more candidate components indicates a size of a list of the one or more candidate components.
19. A system comprising:
a memory to store instructions for hardware system synthesis;
a processor coupled to the memory; and
a communication interface coupled to the processor, wherein the processor is to execute the instructions to:
identify a first set of possible combinations of a first communication protocol based components associated with one or more candidate components, wherein to identify the first set of possible combinations of the first communication protocol based components, results in a first identified set of possible combinations of the first communication protocol based components;
identify a second set of possible combinations of a second communication protocol based components associated with the one or more candidate components, wherein to identify the second set of possible combinations of the second communication protocol based components, results in a second identified set of possible combinations of the second communication protocol based components; and
perform a cross-product of the first identified set of possible combinations of the first communication protocol based components and the second identified set of possible combinations of the second communication protocol based components.
20. The system of claim 19 , wherein the one or more candidate components are interconnected via a programmable silicon interposer, wherein the programmable silicon interposer includes at least one integrated circuit.