Fin field effect transistor (FinFET) device structure with protection layer and method for forming the same

1. A fin field effect transistor (FinFET) device structure, comprising:

a fin structure formed over a substrate;

a gate structure formed over the fin structure;

a source/drain (S/D) structure formed over the fin structure and adjacent to the gate structure;

an S/D contact structure formed over the S/D structure and adjacent to the gate structure;

a protection layer formed on the S/D contact structure, wherein the protection layer and the S/D contact structure are made of different materials, and the protection layer has a bottommost surface in direct contact with a topmost surface of the S/D contact structure; and

a barrier layer over the protection layer, wherein a bottom surface of the barrier layer covers a top surface of the protection layer.

2. The fin field effect transistor (FinFET) device structure as claimed in claim 1 , further comprising:

a dielectric layer formed over the gate structure, wherein a top surface of the protection layer is higher than a top surface of the dielectric layer.

3. The fin field effect transistor (FinFET) device structure as claimed in claim 1 , further comprising:

a dielectric layer formed over the gate structure, wherein the protection layer is embedded in the dielectric layer.

4. The fin field effect transistor (FinFET) device structure as claimed in claim 1 , further comprising:

a S/D conductive plug formed over the protection layer, wherein the S/D conductive plug is electrically connected to the S/D contact structure by the protection layer.

5. The fin field effect transistor (FinFET) device structure as claimed in claim 1 , further comprising:

a metal silicide layer formed over the S/D structure, wherein the metal silicide layer is between the S/D structure and the S/D contact structure.

6. The fin field effect transistor (FinFET) device structure as claimed in claim 1 , further comprising:

a barrier layer surrounding the S/D contact structure, wherein the protection layer is not formed on the barrier layer.

7. The fin field effect transistor (FinFET) device structure as claimed in claim 1 , wherein a sidewall of the protection layer is aligned with a sidewall of the S/D contact structure.

8. The fin field effect transistor (FinFET) device structure as claimed in claim 1 , wherein the protection layer has a curved bottom surface.

9. The fin field effect transistor (FinFET) device structure as claimed in claim 1 , further comprising:

an etching stop layer formed over the protection layer, wherein a portion of the etching stop layer is in direct contact with the protection layer.

10. A fin field effect transistor (FinFET) device structure, comprising:

a fin structure formed over a substrate;

a gate structure formed over the fin structure;

a source/drain (S/D) contact structure formed adjacent to the gate structure; and

a protection layer formed on the S/D contact structure, wherein a sidewall of the protection layer is aligned with a sidewall of the S/D contact structure.

11. The fin field effect transistor (FinFET) device structure as claimed in claim 10 , further comprising:

an etching stop layer formed over the protection layer, wherein a portion of the etching stop layer is in direct contact with the protection layer.

12. The fin field effect transistor (FinFET) device structure as claimed in claim 10 , further comprising:

a barrier layer surrounding the S/D contact structure, wherein the sidewall of the protection layer is aligned with a sidewall of the barrier layer.

13. The fin field effect transistor (FinFET) device structure as claimed in claim 10 , further comprising:

a dielectric layer formed over the gate structure, wherein a bottom surface of the protection layer is lower than a top surface of the dielectric layer.

14. The fin field effect transistor (FinFET) device structure as claimed in claim 10 , further comprising:

a S/D conductive plug formed over the protection layer, wherein the S/D conductive plug is electrically connected to the S/D contact structure by the protection layer.

15. The fin field effect transistor (FinFET) device structure as claimed in claim 10 , wherein the protection layer has a curved bottom surface.

16. A fin field effect transistor (FinFET) device structure, comprising:

a gate structure formed over a fin structure;

a dielectric layer formed over the gate structure;

a source/drain (S/D) contact structure formed in the dielectric layer and adjacent to the gate structure; and

a protection layer formed over the S/D contact structure, wherein a bottom surface of the protection layer is lower than a top surface of the dielectric layer.

17. The fin field effect transistor (FinFET) device structure as claimed in claim 16 , further comprising:

a barrier layer surrounding the S/D contact structure, wherein the protection layer is not formed on the barrier layer.

18. The fin field effect transistor (FinFET) device structure as claimed in claim 16 , further comprising:

a S/D conductive plug formed over the protection layer, wherein the S/D conductive plug is electrically connected to the S/D contact structure by the protection layer.

19. The fin field effect transistor (FinFET) device structure as claimed in claim 16 , wherein the protection layer has a curved bottom surface.

20. The fin field effect transistor (FinFET) device structure as claimed in claim 16 , wherein the protection layer has a curved top surface and a curved bottom surface.