IP Library › Granted Patent US 11,769,724
Granted Patent B2
US 11,769,724 · App. 17/684,431 · Granted Sep 26, 2023

Package having different metal densities in different regions and manufacturing method thereof

Inventors: Hsien-Wei Chen (Hsinchu, TW); Jie Chen (New Taipei, TW); Ming-Fa Chen (Taichung, TW); Sen-Bor Jan (Tainan, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L23/5227H01L21/56H01L23/3107H01L24/03H01L24/05H01L24/20H01L2224/03011
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Quick Facts
Patent No.
US 11,769,724
App. No.
17/684,431
Granted
Sep 26, 2023
Kind
B2
Abstract

A package has a first region and a second region surrounded by the first region. The package includes a first die, a second die, an encapsulant, and an inductor. The first die extends from the first region to the second region. The second die is bonded to the first die and is located within a span of the first die. The encapsulant is aside the second die. At least a portion of the encapsulant is located in the second region. The inductor is located in the second region. The inductor laterally has an offset from the second die. A metal density in the first region is greater than a metal density in the second region.

Claims (42)

1. A package having a first region and a second region surrounded by the first region, comprising:

a first die, extending from the first region to the second region;

a second die bonded to the first die, wherein the second die is located within a span of the first die;

an encapsulant aside the second die, wherein at least a portion of the encapsulant is located in the second region; and

an inductor located in the second region and laterally having an offset from the second die, wherein a metal density in the first region is greater than a metal density in the second region.

2. The package of claim 1 , wherein the first die comprises:

a semiconductor substrate;

an interconnection structure over the semiconductor substrate;

a passivation layer over the interconnection structure;

a bonding layer over the passivation layer, wherein the bonding layer comprises bonding pads located in the first region and dummy bonding pads located in the second region, and a pattern density of the bonding pads is greater than a pattern density of the dummy bonding pads; and

bonding vias penetrating through the passivation layer, wherein the bonding vias electrically connect the interconnection structure and the bonding pads.

3. The package of claim 2 , wherein the inductor is embedded in the interconnection structure.

4. The package of claim 2 , wherein the dummy bonding pads are electrically floating.

5. The package of claim 2 , wherein a ratio of the pattern density of the dummy bonding pads to the pattern density of the bonding pads ranges from 1:2.7 to 1:27.

6. The package of claim 2 , wherein a spacing between two adjacent bonding pads is smaller than a spacing between two adjacent dummy bonding pads.

7. The package of claim 2 , wherein a width of each bonding pad is greater than a width of each dummy bonding pad.

8. The package of claim 1 , further comprising a redistribution structure over the second die and the encapsulant, wherein the inductor is embedded in the redistribution structure.

9. A package, comprising:

a first die, comprising bonding pads and dummy bonding pads, wherein the dummy bonding pads are surrounded by the bonding pads, and a pattern density of the bonding pads is greater than a pattern density of the dummy bonding pads;

a second die bonded to the first die to cover a first portion of the bonding pads;

an encapsulant laterally encapsulating the second die, wherein the encapsulant is directly in contact with the dummy bonding pads and a second portion of the bonding pads; and

an inductor over the dummy bonding pads.

10. The package of claim 9 , wherein the dummy bonding pads are electrically floating.

11. The package of claim 9 , wherein the inductor is embedded in the first die.

12. The package of claim 9 , further comprising a redistribution structure over the second die and the encapsulant, wherein the inductor is embedded in the redistribution structure.

13. The package of claim 9 , wherein the encapsulant is further in direct contact with the inductor.

14. The package of claim 9 , wherein a spacing between two adjacent bonding pads is smaller than a spacing between two adjacent dummy bonding pads.

15. The package of claim 9 , wherein a width of each bonding pad is greater than a width of each dummy bonding pad.

16. A manufacturing method of a package, comprising:

providing a wafer substrate having a first region and a second region surrounded by the first region, comprising:

forming first bonding pads having a first pattern density in the first region; and

forming dummy bonding pads having a second pattern density in the second region, wherein the first pattern density is greater than the second pattern density, and the first bonding pads and the dummy bonding pads are located at a same level height;

placing a die on the first region of the wafer substrate, wherein the die comprises second bonding pads;

bonding the second bonding pads of the die to a portion of the first bonding pads of the wafer substrate;

laterally encapsulating the die by an encapsulant; and

forming an inductor over the second region.

17. The method of claim 16 , wherein at least a portion of the encapsulant is formed to be located over the second region.

18. The method of claim 17 , wherein the inductor is formed to be in direct contact with the portion of the encapsulant located over the second region.

19. The method of claim 16 , further comprising:

forming a redistribution structure over the die and the encapsulant, wherein the inductor is formed in the redistribution structure; and

forming conductive terminals over the redistribution structure.

20. The method of claim 16 , wherein the dummy bonding pads are formed to be electrically floating.

Continuity (3)
Continuation 16929118 · Jul 15, 2020
Provisional Application 62892558 · Aug 28, 2019
Related Publication 20220246524A1 · Aug 4, 2022