Semiconductor device and control system
Detection transistor MNd flows a detection current IdN to a current path CP 1 n when an output voltage Vo generated in a load terminal PN 1 is than a ground voltage GND. A current mirror circuit CMp 1 transfers the detection current IdN flowing in the current path CP 1 n to a current path CP 2 a . Detecting resistor element Rd 1 converts a mirror current I 2 a flowing in the current path CP 2 a to a detection voltage Vd 1 . A control transistor MNc 1 is turned on when the converted detection voltage Vd 1 is higher than a predetermined value. Then, the output transistor QO is controlled to be off while the control transistor MNc 1 is on.
1. A semiconductor device, comprising:
a first power supply terminal to which a first power supply voltage is applied;
a second power supply terminal to which a second power supply voltage lower than the first power supply voltage is applied;
a load terminal to which a load is coupled;
an output transistor which is coupled between the first power supply terminal and the load terminal and is controlled based on a control voltage between a control node thereof and the load terminal;
a driver which controls the control voltage based on a control input signal;
a first current path formed between the first power supply terminal and the load terminal;
a detection transistor which is inserted in the first current path and flows a detection current to the first current path in a period when an output voltage generated at the load terminal is lower than the second power supply voltage;
a current mirror circuit that transfers the detection current flowing through the first current path to a second current path;
a detection resistor element which is inserted in the second current path and converts a current flowing through the second current path to a detection voltage; and
a control transistor which is turned on in a period when the detection voltage converted by the detection resistor element is higher than a predetermined value,
wherein the output transistor is controlled to an off-state in a period when the control transistor is in an on-state.
2. The semiconductor device according to claim 1 ,
wherein the detection resistor element has one end which is coupled to the load terminal and the other end which is coupled to the control node of the control transistor, and
wherein the control transistor short-circuits between the control node thereof and the load terminal in a period when the output transistor is in an on-state.
3. The semiconductor device according to claim 2 ,
wherein the control transistor has a drive capability higher than the driver and short-circuits between the control node thereof and the load terminal regardless of an operation of the driver in a period when the control transistor is in the on-state.
4. The semiconductor device according to claim 1 ,
wherein the detection resistor element has one end which is coupled to the second power supply terminal and the other end which is coupled to the control node of the control transistor,
wherein the control transistor applies the second power supply voltage applied to the second power supply terminal to the driver when the control transistor is in the on-state, and
wherein the driver controls the control voltage to an off level in a period when the second power supply voltage is applied from the control transistor.
5. The semiconductor device according to claim 1 , further comprising:
an adjusting resistor element which adjusts a magnitude of the detection current.
6. The semiconductor device according to claim 1 , further comprising:
a clamping element which is inserted in the first current path, and conducts when a voltage higher than a clamping voltage is applied between both ends thereof,
wherein the clamping voltage is set to a voltage greater than a difference voltage between the first power supply voltage and the second power supply voltage.
7. The semiconductor device according to claim 1 , wherein the semiconductor device is composed of a single semiconductor chip.
8. A semiconductor device, comprising:
a first power supply terminal to which a first power supply voltage is applied;
a second power supply terminal to which a second power supply voltage lower than the first power supply voltage is applied;
a load terminal to which a load is coupled;
an output transistor which is coupled between the second power supply terminal and the load terminal and is controlled based on a control voltage between a control node thereof and the second power supply terminal;
a driver which controls the control voltage based on a control input signal;
a first current path formed between the second power supply terminal and the load terminal;
a detection transistor which is inserted in the first current path and flows a detection current to the first current path in a period when an output voltage generated at the load terminal is higher than the first power supply voltage;
a current mirror circuit that transfers the detection current flowing through the first current path to a second current path;
a detection resistor element which is inserted in the second current path and converts a current flowing through the second current path to a detection voltage; and
a control transistor which is turned on in a period when the detection voltage converted by the detection resistor element is higher than a predetermined value,
wherein the output transistor is controlled to an off-state in a period when the control transistor is in an on-state.
9. The semiconductor device according to claim 8 ,
wherein the detection resistor element has one end which is coupled to the second power supply terminal and the other end which is coupled to the control node of the control transistor, and
wherein the control transistor short-circuits between the control node thereof and the second power supply terminal in a period when the output transistor is in an on-state.
10. The semiconductor device according to claim 9 ,
wherein the control transistor has a drive capability higher than the driver and short-circuits between the control node thereof and the second power supply terminal regardless of an operation of the driver in a period when the control transistor is in the on-state.
11. The semiconductor device according to claim 8 ,
wherein the detection resistor element has one end which is coupled to the second power supply terminal and the other end which is coupled to the control node of the control transistor,
wherein the control transistor applies the second power supply voltage applied to the second power supply terminal to the driver when the control transistor is in the on-state, and
wherein the driver controls the control voltage to an off level in a period when the second power supply voltage is applied from the control transistor.
12. The semiconductor device according to claim 8 , further comprising:
an adjusting resistor element which adjusts a magnitude of the detection current.
13. The semiconductor device according to claim 8 , further comprising:
a clamping element which is inserted in the first current path, and conducts when a voltage higher than a clamping voltage is applied between both ends thereof,
wherein the clamping voltage is set to a voltage greater than a difference voltage between the first power supply voltage and the second power supply voltage.
14. The semiconductor device according to claim 8 , wherein the semiconductor device is composed of a single semiconductor chip.