Image sensor including active regions
An image sensor is provided to include an active region which comprises: a floating diffusion region; a transfer transistor gate region; transistor active regions; and a well-tap region. The transfer transistor gate region may have a diagonal bar shape to isolate the floating diffusion region in a first corner of the active region. The well-tap region may be positioned between the transfer transistor gate region and the transistor active regions, and isolate the transfer transistor gate region from the transistor active regions.
1. An image sensor comprising an active region,
wherein the active region comprises:
a floating diffusion region positioned around a first corner of the active region and operable to store photocharges generated in response to an incident light to the image sensor;
a transfer transistor gate region positioned adjacent to the floating diffusion region and operable to transfer the photocharges to the floating diffusion region;
transistor active regions positioned adjacent to the transfer transistor gate region; and
a well-tap region positioned between the transfer transistor gate region and the transistor active regions to separate the transfer transistor gate region from the transistor active regions,
wherein the well-tap region is extended to contact two neighboring sides of the active region, and
wherein the transistor active regions comprise a drive transistor drain region disposed adjacent to a second corner of the active region, a drive transistor channel region disposed adjacent to a third corner of the active region, and a select transistor source region disposed adjacent to a fourth corner of the active region.
2. The image sensor of claim 1 , wherein the well-tap region is positioned at a center of the active region.
3. The image sensor of claim 1 , wherein the transfer transistor gate region has a bar shape across the active region.
4. The image sensor of claim 1 , wherein the transfer transistor gate region has a bar shape extending along a diagonal direction between the floating diffusion region and the well-tap region.
5. The image sensor of claim 1 , wherein the transfer transistor gate region contacts two neighboring sides of the active region.
6. The image sensor of claim 1 , wherein the transistor active region comprises a drive transistor drain region and a select transistor source region that include an N-doped region, and the transistor active region further comprises a drive transistor channel region including a P-doped region.
7. The image sensor of claim 1 , wherein the transistor active regions comprise a drive transistor channel region and a select transistor source region and further comprise a shared transistor region and a select transistor channel region that are disposed between the drive transistor channel region and the select transistor source region.
8. The image sensor of claim 7 , wherein the shared transistor region includes an N-doped region, and the select transistor channel region includes a P-doped region.
9. The image sensor of claim 1 , wherein the active region has a rectangular shape.
10. An image sensor comprising an active region,
wherein the active region comprises:
a floating diffusion region positioned around a first corner of the active region and operable to store photocharges generated in response to an incident light to the image sensor;
a transfer transistor gate region positioned adjacent to the floating diffusion region and operable to transfer the photocharges to the floating diffusion region;
transistor active regions positioned adjacent to the transfer transistor gate region; and
a well-tap region positioned between the transfer transistor gate region and the transistor active regions to separate the transfer transistor gate region from the transistor active regions,
wherein the well-tap region is extended to contact two neighboring sides of the active region, and
wherein the transistor active regions comprise a reset transistor drain region disposed adjacent to a second corner of the active region, a reset transistor source region disposed adjacent to a third corner of the active region, and a reset transistor channel region disposed between the reset transistor drain region and the reset transistor source region.
11. The image sensor of claim 10 , wherein the reset transistor channel region is disposed adjacent to a fourth corner of the active region, and abuts two neighboring sides of the active region, and
wherein the second and third corners are opposite to each other.
12. An image sensor comprising first to fourth active regions defined by a trench isolation region and arranged in a matrix shape,
wherein the first to fourth active regions respectively comprise:
first to fourth floating diffusion regions;
first to fourth well-tap regions; and
first to fourth transistor active regions,
wherein the first to fourth floating diffusion regions are disposed adjacent to first corners of the first to fourth active regions, respectively,
the first to fourth well-tap regions are disposed around centers of the first to fourth active regions, respectively,
the first to fourth transistor active regions are disposed adjacent to second to fourth corners of the first to fourth active regions, respectively, and
the first to fourth well-tap regions abut two neighboring sides of the first to fourth active regions to isolate the first to fourth floating diffusion regions from the first to fourth transistor active regions, respectively.
13. The image sensor of claim 12 , wherein the first to fourth active regions further comprise first to fourth transfer transistor gate regions, respectively, each of the first to fourth transfer transistor gate being disposed between a corresponding one of the first to fourth floating diffusion regions and a corresponding one of the first to fourth well-tap regions.
14. The image sensor of claim 13 , wherein the first to fourth transfer transistor gate regions abut the two neighboring sides of the first to fourth active regions, respectively.
15. The image sensor of claim 12 , wherein the first to fourth well-tap regions include P-doped regions, and the first to fourth transistor active regions include N-doped regions.