IP Library › Granted Patent US 11,837,534
Granted Patent B2
US 11,837,534 · App. 15/859,309 · Granted Dec 5, 2023

Substrate with variable height conductive and dielectric elements

Inventors: Aleksandar Aleksov (Chandler, AZ); Kristof Darmawikarta (Chandler, AZ); Haobo Chen (Gilbert, AZ); Changhua Liu (Chandler, AZ); Sri Ranga Sai Boyapati (Chandler, AZ); Bai Nie (Chandler, AZ)
Assignee: Intel Corporation
H01L23/49838H01L21/4857H01L23/49822
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Quick Facts
Patent No.
US 11,837,534
App. No.
15/859,309
Granted
Dec 5, 2023
Kind
B2
Abstract

Apparatuses, systems and methods associated with package substrate design with variable height conductive elements within a single layer are disclosed herein. In embodiments, a substrate may include a first layer, wherein a trench is located in the first layer, and a second layer located on a surface of the first layer. The substrate may further include a first conductive element located in a first portion of the second layer adjacent to the trench, wherein the first conductive element extends to fill the trench, and a second conductive element located in a second portion of the second layer, wherein the second conductive element is located on the surface of the first layer. Other embodiments may be described and/or claimed.

Claims (24)

1. A substrate, comprising:

a conductive pad having a top surface and side surfaces;

a first insulator layer having a first portion on the top surface of the conductive pad and a second portion along the side surfaces of the conductive pad, the first portion of the first insulator layer continuous with and having a same composition as the second portion of the first insulator layer, wherein a trench is located in the first insulator layer, the trench exposing a portion of the top surface of the conductive pad;

a second insulator layer located on a surface of the first insulator layer, the second insulator layer having a top surface;

a first conductive element located in a first portion of the second insulator layer adjacent to the trench, wherein the first conductive element extends to fill the trench and contacts the portion of the top surface of the conductive pad exposed by the trench, and wherein the first conductive element extends laterally over a first portion of the top surface of the second insulator layer, the first conductive element having an uppermost surface and a bottommost surface in a cross-sectional view;

a second conductive element located in a second portion of the second insulator layer, wherein the second conductive element is located directly on the surface of the first insulator layer, and wherein the second conductive element extends laterally over a second portion of the top surface of the second insulator layer, the second conductive element having an uppermost surface and a bottommost surface in the cross-sectional view, the uppermost surface of the second conductive element at a same level as the uppermost surface of the first conductive element, and the bottommost surface of the second conductive element above the bottommost surface of the first conductive element; and

a third conductive element located on a third portion of the top surface of the second insulator layer, wherein the third conductive element does not extend into the second insulator layer, the third conductive element having an uppermost surface and a bottommost surface in the cross-sectional view, the uppermost surface of the third conductive element at a same level as the uppermost surface of the second conductive element, and the bottommost surface of the third conductive element above the bottommost surface of the second conductive element;

wherein a distance that the first conductive element extends away from the surface of the first insulator layer is same as a distance that the second conductive element extends away from the surface of the first insulator layer; and

wherein the surface of the first insulator layer is a first surface, wherein a third layer is located on a second surface of the first insulator layer, the second surface being opposite to the first surface, and wherein a surface of the first conductive element at a bottom of the trench abuts the third layer.

2. The substrate of claim 1 , wherein a thickness of the first conductive element is greater than a thickness of the second conductive element.

3. The substrate of claim 1 , wherein the first insulator layer includes a photo-imageable insulator material.

4. The substrate of claim 1 , wherein the first conductive element is a first trace, and wherein the second conductive element is a second trace.

5. A semiconductor package, comprising:

a die; and

a substrate coupled to the die, the substrate comprising:

a conductive pad having a top surface and side surfaces;

a first insulator layer having a first portion on the top surface of the conductive pad and a second portion along the side surfaces of the conductive pad, the first portion of the first insulator layer continuous with and having a same composition as the second portion of the first insulator layer, wherein a trench is located in the first insulator layer, the trench exposing a portion of the top surface of the conductive pad;

a second insulator layer located on a surface of the first insulator layer, the second insulator layer having a top surface; a first conductive element located in a first portion of the second insulator layer adjacent to the trench, wherein the first conductive element extends to fill the trench and contacts the portion of the top surface of the conductive pad exposed by the trench, and wherein the first conductive element extends laterally over a first portion of the top surface of the second insulator layer, the first conductive element having an uppermost surface and a bottommost surface in a cross-sectional view;

a second conductive element located in a second portion of the second insulator layer, wherein the second conductive element is located directly on the surface of the first insulator layer, and wherein the second conductive element extends laterally over a second portion of the top surface of the second insulator layer, the second conductive element having an uppermost surface and a bottommost surface in the cross-sectional view, the uppermost surface of the second conductive element at a same level as the uppermost surface of the first conductive element, and the bottommost surface of the second conductive element above the bottommost surface of the first conductive element; and

a third conductive element located on a third portion of the top surface of the second insulator layer, wherein the third conductive element does not extend into the second insulator layer, the third conductive element having an uppermost surface and a bottommost surface in the cross-sectional view, the uppermost surface of the third conductive element at a same level as the uppermost surface of the second conductive element, and the bottommost surface of the third conductive element above the bottommost surface of the second conductive element;

wherein a distance that the first conductive element extends away from the surface of the first insulator layer is same as a distance that the second conductive element extends away from the surface of the first insulator layer; and

wherein the surface of the first insulator layer is a first surface, wherein a third layer is located on a second surface of the first insulator layer, the second surface being opposite to the first surface, and wherein a surface of the first conductive element at a bottom of the trench abuts the third layer.

6. The semiconductor package of claim 5 , wherein a thickness of the first conductive element is greater than a thickness of the second conductive element.

7. The semiconductor package of claim 5 , wherein the first insulator layer includes a photo-imageable insulator material.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2025
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP. (DBA SOLIDIGM)
Reel/Frame 072792/0266 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 9, 2018
From: ALEKSOV, ALEKSANDAR; DARMAWIKARTA, KRISTOF; CHEN, HAOBO; LIU, CHANGHUA; BOYAPATI, SRI RANGA SAI; NIE, BAI
To: INTEL CORPORATION
Reel/Frame 045163/0526 →
Continuity (1)
Related Publication 20190206781A1 · Jul 4, 2019
Cited By (1)
US 12,288,744