IP Library › Granted Patent US 11,846,738
Granted Patent B2
US 11,846,738 · App. 17/605,070 · Granted Dec 19, 2023

Radiation detection systems and methods

Inventors: Tim Z Hossain (Austin, TX); Mark Clopton (Austin, TX); Clayton Fullwood (Austin, TX)
Assignee: CERIUM LABORATORIES LLC
G01T1/243G01T1/242
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Quick Facts
Patent No.
US 11,846,738
App. No.
17/605,070
Granted
Dec 19, 2023
Kind
B2
Abstract

A method of forming a radiation detector includes forming a stack including a plurality of arrays of radiation detection devices. Forming an array of the plurality of arrays includes forming a polysilicon layer over an interlayer dielectric layer of another array of the plurality of arrays; forming charge storage layers over the polysilicon layer; forming a second polysilicon layer over the charge storage layers; etching the second polysilicon layer to form gate stacks; and depositing an interlayer dielectric disposed on at least three sides of the gate stacks, the interlayer dielectric including a radiation reactive material.

Claims (30)

1. A method of forming a radiation detector, the method comprising:

forming a stack including a plurality of arrays of radiation detection devices, wherein forming an array of the plurality of arrays includes:

forming a polysilicon layer over an interlayer dielectric layer of another array of the plurality of arrays;

forming charge storage layers over the polysilicon layer, wherein forming the charge storage layers includes forming a layer of an oxide of silicon having a thickness in a range of 1 nm to 3 nm directly on the polysilicon layer, forming a layer of a nitride of silicon on the layer of the oxide of silicon, and forming a second layer of an oxide of silicon, wherein the layer of the nitride of silicon defines two charge storage regions;

forming a second polysilicon layer over the charge storage layers;

etching the second polysilicon layer to form gate stacks; and

depositing an interlayer dielectric disposed on at least three sides of the gate stacks, the interlayer dielectric including a radiation reactive material.

2. The method of claim 1 , further comprising forming source/drains in the polysilicon layer prior to depositing the interlayer dielectric.

3. The method of claim 1 , further comprising forming a silicide layer over the gate stacks prior to depositing the interlayer dielectric.

4. The method of claim 1 , wherein the radiation reactive material includes a radiation reactive component selected from boron-10 ( 10 B), lithium-6 ( 6 Li), cadmium-113 ( 113 Cd), gadolinium-157 ( 157 Gd), uranium-235 ( 235 U), and a combination thereof.

5. The method of claim 4 , wherein the radiation reactive material includes at least 50% of the radiation reactive component.

6. The method of claim 5 , wherein the radiation reactive material includes at least 80% of the radiation reactive component.

7. The method of claim 4 , wherein the radiation reactive material includes an oxide, nitride, oxynitride, or carbide of the radiation reactive component.

8. The method of claim 4 , wherein the radiation reactive material includes an oxide, nitride, oxynitride, or carbide of boron-10.

9. The method of claim 8 , wherein the radiation reactive material includes an oxide of boron-10.

10. The method of claim 1 , wherein the layer of the nitride of silicon has a thickness in a range of 3 nm to 7 nm.

11. The method of claim 1 , wherein the second layer of the oxide of silicon has a thickness in a range of 3 nm to 15 nm.

12. The method of claim 1 , wherein a single word line connects to a gate in each array of the plurality of arrays.

13. The method of claim 1 , wherein a single bit line connects to a source/drain in each array of the plurality of arrays.

14. A method of forming a radiation detector, the method comprising:

forming charge storage layers over a polysilicon layer, wherein forming the charge storage layers includes forming a layer of an oxide of silicon having a thickness in a range of 1 nm to 3 nm directly on the polysilicon layer, forming a layer of a nitride of silicon on the layer of the oxide of silicon, and forming a second layer of an oxide of silicon, wherein the layer of the nitride of silicon defines two charge storage regions;

forming a second polysilicon layer over the charge storage layers;

etching the second polysilicon layer to form gate stacks; and

depositing an insulative dielectric disposed on at least three sides of the gate stacks, the insulative dielectric including a radiation reactive material.

15. The method of claim 14 , further comprising forming source/drains in the polysilicon layer prior to depositing the insulative dielectric.

16. The method of claim 14 , further comprising forming a silicide layer over the gate stacks prior to depositing the insulative dielectric.

17. The method of claim 14 , wherein the radiation reactive material includes a radiation reactive component selected from boron-10 ( 10 B), lithium-6 ( 6 Li), cadmium-113 ( 113 Cd), gadolinium-157 ( 157 Gd), uranium-235 ( 235 U), and a combination thereof.

18. The method of claim 17 , wherein the radiation reactive material includes at least 50% of the radiation reactive component.

19. The method of claim 17 , wherein the radiation reactive material includes an oxide, nitride, oxynitride, or carbide of the radiation reactive component.

20. The method of claim 17 , wherein the radiation reactive material includes an oxide, nitride, oxynitride, or carbide of boron-10.

Continuity (2)
Provisional Application 62837286 · Apr 23, 2019
Related Publication 20220206170A1 · Jun 30, 2022
Cited By (2)
US 12,235,398 US 12,554,028