Hardware compute fabrics for deep equilibrium models
A dynamic equilibrium (DEQ) model circuit includes a first multiplier configured to receive an input, scale the input by a first weight, and output the scaled input, second multiplier configured to receive a root, scale the root by a second weight, and output the scaled root, a summation block configured to combine the scaled input, a bias input, and the scaled root and output a non-linear input, and a first non-linear function configured to receive the non-linear input and output the root, wherein the first weight and second weight are based on a trained DEQ model of a neural network.
1. A dynamic equilibrium (DEQ) model circuit comprising:
a first multiplier configured to receive an input data, scale the input data by a first weight, and output the scaled input data;
a second multiplier configured to receive a root, scale the root by a second weight, and output the scaled root;
a summation block configured to combine the scaled input data, a bias input data, and the scaled root and output a non-linear input data; and
a first non-linear function associated with a DEQ network state and configured to receive the non-linear input data and output, utilizing the non-linear in input data, a final state root associated with an equilibrium state of the DEQ model Circuit, wherein the first weight and second weight are based on a trained DEQ model of a neural network.
2. The model circuit of claim 1 , wherein the circuit further includes a sample and hold circuit coupled between a first non-linear block and a second non-linear block.
3. The model circuit of claim 1 , wherein the circuit further includes one or more delay blocks configured to output a current output root as a function of one or more previous inputs and one or more previous output roots.
4. The model circuit of claim 1 , wherein the circuit further includes a second non-linear function configured to scale the root and output a dynamic equilibrium response.
5. The model circuit of claim 1 , wherein the input data is multiplied by a weight that is a scalar, vector, or full tensor.
6. The model circuit of claim 1 , wherein the multiplier is configured to output the scaled input data in response to a convolution function or a linear operation function.
7. The model circuit of claim 1 , wherein the circuit is further configured to receive the bias input data via a row driver, compute fabric, or one or more electrical components.
8. A dynamic equilibrium (DEQ) model circuit comprising:
a first multiplier configured to receive an input, scale the input by a first weight, and output the scaled input;
a second multiplier configured to receive a root, scale the root by a second weight, and output the scaled root;
a summation block configured to combine the scaled input and the scaled root, wherein the summation block is configured to output a non-linear input; and
a first non-linear function configured to receive the non-linear input and output a final state root utilizing the non-linear input, wherein the first weight and second weight are based on a trained DEQ model of a neural network.
9. The model circuit of claim 8 , wherein the first multiplier and second multiplier includes a transistor, inductor, capacitor, or resistor.
10. The model circuit of claim 8 , wherein the summation block is a compute fabric including one or more electrical components.
11. The model circuit of claim 8 , wherein the first non-linear function includes a transistor, inductor, capacitor, amplifier, or resistor.
12. The model circuit of claim 8 , wherein the input includes analog or digital signals.
13. The model circuit of claim 8 , wherein the input is multiplied by a weight that is a scalar, vector, or full tensor.
14. The model circuit of claim 8 , wherein the circuit further includes a second non-linear function or a second linear function configured to scale the root and output a dynamic equilibrium response.
15. A dynamic equilibrium (DEQ) model circuit comprising:
a compute fabric configured to receive an input at a row driver of the compute fabric, and scale the input by a first weight and a second weight and output a root, wherein the scaling is accomplished utilizing one or more electrical components; and
an output layer configured to receive the root, wherein the output layer is further configured to output a scaled root in response the root and a first non-linear function associated with an amplifier, wherein the first weight and second weight are based on a trained DEQ model of a neural network, wherein the output layer includes one or more electrical components; and
utilizing the amplifier, output a final state root associated with the trained DEQ model.
16. The model circuit of claim 15 , wherein the model circuit is configured to receive a bias at the compute fabric.
17. The model circuit of claim 15 , wherein the output layer is further configured to output a classification in response to the input.
18. The model circuit of claim 15 , wherein the the amplifier includes a non-linear amplifier utilized.
19. The model circuit of claim 15 , wherein the input is a digital signal or analog signal.
20. The model circuit of claim 15 , wherein the input is a digital signal converted to an analog signal inside the compute fabric.