Semiconductor device contact structures and methods of fabricating thereof

1. A method of fabricating a semiconductor device, comprising:

forming a gate structure and a source/drain region on a semiconductor substrate;

recessing the gate structure to form a first recess above a remaining gate structure;

depositing a first dielectric material in the first recess;

after depositing the first dielectric material, forming a second recess above the source/drain region;

forming a dummy film on sidewalls of the second recess, wherein the forming the dummy film includes:

depositing a conformal layer of a dummy film material, and

etching the conformal layer of the dummy film material to remove the dummy film material from a bottom of the second recess;

forming a second dielectric layer on the dummy film after removing the dummy film material from the bottom of the second recess;

filling a remaining portion of the second recess with a conductive material; and

removing the dummy film to form an air gap between the conductive material and the remaining gate structure.

2. The method of claim 1 , wherein the forming the second recess includes selectively etching an inter-layer dielectric (ILD) layer over the source/drain region.

3. The method of claim 1 , further comprising:

providing a silicon nitride layer between the gate structure and the air gap.

4. The method of claim 1 , wherein the

depositing the dummy film material includes providing the dummy film material having a first composition with an etch selectivity to a second composition of the second dielectric layer.

5. The method of claim 1 , wherein the forming the second dielectric layer includes:

depositing a conformal layer of a second dielectric material, and

etching the conformal layer of the second dielectric material to remove the second dielectric material from a bottom of the second recess prior to filling the remaining portion.

6. The method of claim 1 , wherein the forming the dummy film includes depositing at least one of aluminum oxide or silicon.

7. The method of claim 1 , further comprising:

depositing a contact etch stop layer (CESL) over the air gap, wherein the CESL fills a portion of the air gap.

8. The method of claim 1 , further comprising:

after forming the second dielectric layer and prior to filling the remaining portion of the second recess with the conductive material, siliciding a portion of the source/drain region.

9. The method of claim 1 , further comprising:

providing spacer elements adjacent a dummy gate structure;

reducing a thickness of the spacer elements; and

after reducing the thickness, replacing the dummy gate structure with the gate structure.

10. A method of fabricating a semiconductor device, comprising:

providing a substrate having a source/drain feature and an interlayer dielectric (ILD) layer formed thereover;

forming an opening in the ILD layer exposing the source/drain feature;

depositing a dummy film over the ILD layer and within the opening;

etching the deposited dummy film to remove the dummy film from a bottom of the opening and a top surface of the ILD layer;

forming a second dielectric layer over the etched dummy film;

etching the second dielectric layer to remove the second dielectric layer from the bottom of the opening and the top surface of the ILD layer; and

after etching the second dielectric layer, filling the opening with a conductive material; and

removing the etched dummy film to form an air gap; and

forming a third dielectric layer over the air gap.

11. The method of claim 10 , further comprising:

after etching the second dielectric layer and before filling the opening, forming a silicide region on the source/drain feature.

12. The method of claim 11 , wherein the filling the opening includes providing the conductive material an interface with the silicide region.

13. The method of claim 10 , wherein the forming the third dielectric layer includes forming a contact etch stop layer (CESL) over a top of the air gap.

14. The method of claim 13 , wherein the CESL interfaces a second portion of the air gap wherein the CESL fills a first portion of the air gap, the second portion of the air gap disposed below the first portion.

15. The method of claim 13 , wherein the third dielectric layer is formed over the ILD layer and the second dielectric layer.

16. The method of claim 10 , further comprising:

providing a fin structure on the substrate;

recessing at least a portion of the fin structure; and

epitaxially growing the source/drain feature on the recessed portion of the fin structure.

17. A method of fabricating a semiconductor device, comprising:

providing a substrate having a source/drain feature and a dielectric layer formed thereover;

forming an opening in the dielectric layer exposing the source/drain feature;

depositing a dummy film along sidewalls of the opening;

forming a second dielectric layer abutting the dummy film along the sidewalls of the opening;

after forming the second dielectric layer, exposing a surface of the source/drain feature, siliciding the surface of the source/drain feature to form a silicided portion, and filling the opening with a conductive material disposed over the silicided portion; and

removing the dummy film to form an air gap between the conductive material and the dielectric layer.

18. The method of claim 17 , depositing a second dielectric material over the air gap, wherein a bottom portion of the formed air gap is maintained after the depositing the second dielectric layer and a top portion of the formed air gap is filled with the second dielectric material.

19. The method of claim 17 , wherein the providing the substrate having the source/drain feature includes:

providing a fin structure extending from the substrate;

recessing at least a portion of the fin structure; and

epitaxially growing the source/drain feature on the recessed portion of the fin structure.

20. The method of claim 17 , wherein the depositing the dummy film along sidewalls of the opening includes:

depositing a conformal layer of a dummy material; and

etching the dummy material from a bottom surface of the opening.