Management of erase suspend and resume operations in memory devices

1. A method comprising:

determining, by a processing device, a first time period for executing an erase suspend operation on a memory device;

executing a portion of an erase operation during the first time period;

responsive to detecting an expiration of a second time period for executing the portion of the erase operation, executing, during the first time period, the erase suspend operation to suspend the erase operation, wherein the second time period is based on a plurality of execution times of erase operations performed on the memory device;

responsive to detecting completion of the erase suspend operation, executing one or more commands during a third time period; and

executing, by the processing device, an erase resume operation to resume the erase operation on the memory device.

2. The method of claim 1 , wherein a sequence of the first time period for executing the portion of the erase operation and the third time period for executing the one or more commands is repeated until an execution of the erase operation completes.

3. The method of claim 1 , wherein detecting completion of the erase suspend operation further comprises receiving a notification that the erase suspend operation is complete.

4. The method of claim 2 , further comprising:

responsive to a completion of execution of the erase operation:

receiving, by the processing device, a feedback corresponding to the execution of the erase operation; and

updating the first time period and the third time period based on the feedback.

5. The method of claim 4 , wherein the feedback corresponds to a plurality of actual execution times of the erase operation and the one or more commands.

6. The method of claim 1 , further comprising:

executing at least one of an erase suspend operation, an erase resume operation, or an erase complete operation during the first time period.

7. The method of claim 1 , wherein the one or more commands are at least one of a read operation, a write operation, or a garbage collection operation at the memory device.

8. The method of claim 2 , further comprising:

executing a second portion of the erase operation during a subsequent sequence of the first time period;

executing the erase suspend operation to suspend the erase operation during the subsequent sequence of the first time period;

responsive to detecting completion of the erase suspend operation, determining whether the one or more commands are received, from a controller, during a fourth time period; and

responsive to determining that no commands are received during the fourth time period, executing the erase resume operation to resume the erase operation on the memory device.

9. A system comprising:

a memory device; and

a processing device, operatively coupled with the memory device, to:

determine, by the processing device, a first time period for executing an erase suspend operation on the memory device;

execute a portion of an erase operation during the first time period;

responsive to detecting an expiration of a second time period for executing the portion of the erase operation, execute, during the first time period, the erase suspend operation to suspend the erase operation, wherein the second time period is based on a plurality of execution times of erase operations performed on the memory device;

responsive to detecting completion of the erase suspend operation, execute one or more commands during a third time period; and

execute, by the processing device, an erase resume operation to resume the erase operation on the memory device.

10. The system of claim 9 , wherein a sequence of the first time period for executing the erase suspend operation and the third time period for executing the one or more commands is repeated until an execution of the erase operation completes.

11. The system of claim 9 , wherein to detect completion of the erase suspend operation, the processing device is further to receive a notification that the suspend operation is complete.

12. The system of claim 10 , wherein the processing device is further to:

responsive to a completion of execution of the erase operation:

receive, by the processing device, a feedback corresponding to the execution of the erase operation; and

update the first time period and the third time period based on the feedback.

13. The system of claim 12 , wherein the feedback corresponds to a plurality of actual execution times of the erase operation and the one or more commands.

14. The system of claim 9 , wherein the processing device is further to:

execute at least one of an erase suspend operation, an erase resume operation, or an erase complete operation during the first time period.

15. The system of claim 9 , wherein the one or more commands are at least one of a read operation, a write operation, or a garbage collection operation at the memory device.

16. The system of claim 10 , wherein the processing device is further to:

execute a second portion of the erase operation during a subsequent sequence of the first time period;

execute the erase suspend operation to suspend the erase operation during the subsequent sequence of the first time period;

responsive to detecting completion of the erase suspend operation, determine whether the one or more commands are received, from a controller, during a fourth time period; and

responsive to determining that no commands are received during the fourth time period, execute the erase resume operation to resume the erase operation on the memory device.

17. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:

determine, by the processing device, a first time period for executing an erase suspend operation on a memory device;

execute a portion an erase operation during the first time period;

responsive to detecting an expiration of a second time period for executing the portion of the erase operation,execute, during the first time period, the erase suspend operation to suspend the erase operation, wherein the second time period is based on a plurality of execution times of erase operations performed on the memory device;

responsive to detecting completion of the erase suspend operation, determine whether one or more commands are received during a wait time period; and

execute, by the processing device, an erase resume operation to resume the erase operation on the memory device.

18. The non-transitory computer-readable storage medium of claim 17 , wherein the processing device is further to:

responsive to determining that the one or more commands are received during the wait time period, execute the one or more commands during a third time period; and

responsive to an expiration of the third time period, execute the erase resume operation to resume the erase operation on the memory device.

19. The non-transitory computer-readable storage medium of claim 18 , wherein the processing device is further to:

responsive to a completion of execution of the erase operation:

receive a feedback corresponding to the execution of the erase operation; and

update the first time period and the third time period based on the feedback.

20. The non-transitory computer-readable storage medium of claim 19 , wherein the feedback corresponds to a plurality of actual execution times of the erase operation and the one or more commands.