IP Library › Granted Patent US 11,869,119
Granted Patent B2
US 11,869,119 · App. 17/666,193 · Granted Jan 9, 2024

Controlling coarse pixel size from a stencil buffer

Inventors: Karthik Vaidyanathan (Berkeley, CA); Prasoonkumar Surti (Folsom, CA); Hugues Labbe (Folsom, CA); Atsuo Kuwahara (Portland, OR); Sameer Kp (Bangalore, IN); Jonathan Kennedy (Bristol, GB); Murali Ramadoss (Folsom, CA); Michael Apodaca (Folsom, CA); Abhishek Venkatesh (Hillsboro, OR)
Assignee: Intel Corporation
G06T11/001G06T1/20G06T1/60G06T15/005G06T2210/52
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Quick Facts
Patent No.
US 11,869,119
App. No.
17/666,193
Granted
Jan 9, 2024
Kind
B2
Abstract

Systems, apparatuses and methods may provide for technology that determines a stencil value and uses the stencil value to control, via a stencil buffer, a coarse pixel size of a graphics pipeline. Additionally, the stencil value may include a first range of bits defining a first dimension of the coarse pixel size and a second range of bits defining a second dimension of the coarse pixel size. In one example, the coarse pixel size is controlled for a plurality of pixels on a per pixel basis.

Claims (57)

1. A system comprising:

a display;

a graphics pipeline coupled to the display; and

logic to:

identify a two-dimensional (2D) texture value,

determine, based on the 2D texture value, a size of a group of pixels that are to share a single pixel shader evaluation, and

conduct the single pixel shader evaluation to generate a value for the group of pixels.

2. The system of claim 1 , wherein the logic is to:

identify different ranges of bits of the 2D texture value that correspond to different dimensions of the group of pixels.

3. The system of claim 1 , wherein the 2D texture value is a single 2D texture value.

4. The system of claim 1 , wherein the 2D texture value is to be determined during a depth analysis of a scene to be rendered.

5. The system of claim 4 , wherein the logic is to:

determine a level of detail for the scene; and

set the 2D texture value based on the level of detail.

6. The system of claim 1 , wherein the logic is to:

retrieve the 2D texture value from a stencil buffer.

7. An apparatus comprising:

a substrate; and

logic coupled to the substrate, wherein the logic is implemented in one or more of configurable logic or fixed-functionality hardware logic, the logic coupled to the substrate to:

identify a two-dimensional (2D) texture value,

determine, based on the 2D texture value, a size of a group of pixels that are to share a single pixel shader evaluation, and

conduct the single pixel shader evaluation to generate a value for the group of pixels.

8. The apparatus of claim 7 , wherein the logic coupled to the substrate is to:

identify different ranges of bits of the 2D texture value that correspond to different dimensions of the group of pixels.

9. The apparatus of claim 7 , wherein the 2D texture value is a single 2D texture value.

10. The apparatus of claim 7 , wherein the 2D texture value is to be determined during a depth analysis of a scene to be rendered.

11. The apparatus of claim 10 , wherein the logic coupled to the substrate is to:

determine a level of detail for the scene; and

set the 2D texture value based on the level of detail.

12. The apparatus of claim 7 , wherein the logic coupled to the substrate is to:

retrieve the 2D texture value from a stencil buffer.

13. At least one non-transitory computer readable storage medium comprising a set of instructions, which when executed by a computing system, cause the computing system to:

identify a two-dimensional (2D) texture value;

determine, based on the 2D texture value, a size of a group of pixels that are to share a single pixel shader evaluation; and

conduct the single pixel shader evaluation to generate a value for the group of pixels.

14. The at least one non-transitory computer readable storage medium of claim 13 , wherein the instructions, when executed, cause the computing system to:

identify different ranges of bits of the 2D texture value that correspond to different dimensions of the group of pixels.

15. The at least one non-transitory computer readable storage medium of claim 13 , wherein the 2D texture value is a single 2D texture value.

16. The at least one non-transitory computer readable storage medium of claim 13 , wherein the 2D texture value is to be determined during a depth analysis of a scene to be rendered.

17. The at least one non-transitory computer readable storage medium of claim 16 , wherein the instructions, when executed, cause the computing system to:

determine a level of detail for the scene; and

set the 2D texture value based on the level of detail.

18. The at least one non-transitory computer readable storage medium of claim 13 , wherein the instructions, when executed, cause the computing system to:

retrieve the 2D texture value from a stencil buffer.

19. A method comprising:

identifying a two-dimensional (2D) texture value;

determining, based on the 2D texture value, a size of a group of pixels that are to share a single pixel shader evaluation; and

conducting, with a graphics pipeline, the single pixel shader evaluation to generate a value for the group of pixels.

20. The method of claim 19 , further comprising:

identifying different ranges of bits of the 2D texture value that correspond to different dimensions of the group of pixels.

21. The method of claim 19 , wherein the 2D texture value is a single 2D texture value.

22. The method of claim 19 , wherein the 2D texture value is determined during a depth analysis of a scene that will be rendered.

23. The method of claim 22 , further comprising:

determining a level of detail for the scene; and

setting the 2D texture value based on the level of detail.

24. The method of claim 19 , further comprising:

retrieving the 2D texture value from a stencil buffer.

Continuity (4)
Continuation 16919839 · Jul 2, 2020
Continuation 16142866 · Sep 26, 2018
Continuation 15483701 · Apr 10, 2017
Related Publication 20220262047A1 · Aug 18, 2022
Cited By (1)
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