IP Library Granted Patent US 11,869,770
Granted Patent B2
US 11,869,770 · App. 17/389,301 · Granted Jan 9, 2024

Selective deposition of etch-stop layer for enhanced patterning

Inventors: Nagraj Shankar (Tualatin, OR); Kapu Sirish Reddy (Portland, OR); Jon Henri (West Linn, OR); Pengyi Zhang (Tigard, OR); Elham Mohimi (Hillsboro, OR); Bhavin Jariwala (Lake Oswego, OR); Arpan Pravin Mahorowala (West Linn, OR)
Assignee: Lam Research Corporation
H01L21/0337C23C16/401C23C16/403C23C16/45536C23C16/45544H01L21/0228H01L21/0273H01L21/02115H01L21/02164H01L21/02178H01L21/02274H01L21/0332H01L21/0338H01L21/3081H01L21/3086H01L21/3088H01L21/30604H01L21/31058H01L21/31122H01L21/31144C23F1/08H01L21/67069
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Quick Facts
Patent No.
US 11,869,770
App. No.
17/389,301
Granted
Jan 9, 2024
Kind
B2
Abstract

Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M 2 ) on top of a base material (M 1 ) of a substrate, M 2 defining a pattern for etching M 1 in areas where M 2 is not present above M 1 . The method further includes operations for conformally capping the substrate with an oxide material (M 3 ) after adding M 2 , and for gap filling the substrate with filling material M 4 after the conformally capping. Further, a stop-etch material (M 5 ) is selectively grown on exposed surfaces of M 3 and not on surfaces of M 4 after the gap filling. Additionally, the method includes operations for removing M 4 from the substrate after selectively growing M 5 , and for etching the substrate after removing M 4 to transfer the pattern into M 1 . M 5 adds etching protection to enable deeper etching into M 1.

Claims (44)

1. A method comprising:

adding a photo-resist material (M 2 ) on top of a base material (M 1 ) of a substrate, M 2 defining a pattern for etching M 1 in areas where M 2 is not present above M 1 ;

conformally capping the substrate with an oxide material (M 3 ) after adding M 2 ;

depositing a layer of a conformal material (M 6 ) after conformally capping the substrate;

gap filling the substrate with filling material M 4 after depositing M 6 ;

removing top surfaces of M 6 from the substrate after the gap filling;

selectively growing stop-etch material (M 5 ) on exposed surfaces of M 3 ;

removing M 4 from the substrate after selectively growing M 5 ; and

etching the substrate after removing M 4 to transfer the pattern into M 1 .

2. The method as recited in claim 1 , wherein etching the substrate after removing M 4 further comprises:

etching exposed surfaces of M 3 on the substrate; and

continue etching the substrate to transfer the pattern into M 1 .

3. The method as recited in claim 1 , wherein depositing the layer of M 6 includes performing a low-damage plasma enhanced atomic layer deposition (PEALD).

4. The method as recited in claim 1 , wherein removing M 6 from the substrate after the gap filling includes performing a light etch operation to expose a surface of the oxide material.

5. The method as recited in claim 1 , wherein selectively growing M 5 is performed by MOCVD (Metal Organic CVD).

6. The method as recited in claim 1 , wherein removing M 4 from the substrate after selectively growing M 5 includes removing by ashing.

7. The method as recited in claim 1 , wherein conformally capping the substrate with M 3 further comprises:

performing a low-damage plasma enhanced atomic layer deposition.

8. The method as recited in claim 1 , wherein M 2 is a carbon-based material.

9. The method as recited in claim 1 , wherein M 3 is one of silicon dioxide or aluminum oxide.

10. The method as recited in claim 1 , wherein M 4 is a CHx surface.

11. The method as recited in claim 1 , wherein M 6 is a fluorocarbon.

12. The method as recited in claim 1 , wherein M 5 is a metal oxide or oxynitride.

13. A semiconductor manufacturing apparatus comprising:

a processing chamber; and

a controller for controlling processing of a substrate within the processing chamber, wherein the controller causes the processing chamber to perform operations comprising:

adding a photo-resist material (M 2 ) on top of a base material (M 1 ) of a substrate, M 2 defining a pattern for etching M 1 in areas where M 2 is not present above M 1 ;

conformally capping the substrate with an oxide material (M 3 ) after adding M 2 ;

depositing a layer of a conformal material (M 6 ) after conformally capping the substrate;

gap filling the substrate with filling material M 4 after depositing M 6 ;

removing top surfaces of M 6 from the substrate after the gap filling;

selectively growing stop-etch material (M 5 ) on exposed surfaces of M 3 ;

removing M 4 from the substrate after selectively growing M 5 ; and

etching the substrate after removing M 4 to transfer the pattern into M 1 .

14. The semiconductor manufacturing apparatus as recited in claim 13 , wherein etching the substrate after removing M 4 further comprises:

etching exposed surfaces of M 3 on the substrate; and

continue etching the substrate to transfer the pattern into M 1 .

15. The semiconductor manufacturing apparatus as recited in claim 13 , wherein depositing the layer of M 6 includes performing a low-damage plasma enhanced atomic layer deposition (PEALD).

16. The semiconductor manufacturing apparatus as recited in claim 13 , wherein removing the top surfaces of M 6 from the substrate after the gap filling includes performing a light etch operation to expose a surface of the oxide material.

17. The semiconductor manufacturing apparatus as recited in claim 13 , wherein selectively growing M 5 is performed by MOCVD (Metal Organic CVD).

18. The semiconductor manufacturing apparatus as recited in claim 13 , wherein removing M 4 from the substrate after selectively growing M 5 includes removing by ashing.

19. The semiconductor manufacturing apparatus as recited in claim 13 , wherein conformally capping the substrate with M 3 further comprises:

performing a low-damage plasma enhanced atomic layer deposition.

20. The semiconductor manufacturing apparatus as recited in claim 13 , wherein M 2 is a carbon-based material, wherein M 3 is one of silicon dioxide or aluminum oxide, wherein M 4 is a CHx surface, wherein M 5 is a metal oxide or oxynitride, wherein M 6 is a fluorocarbon.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2021
From: SHANKAR, NAGRAJ; REDDY, KAPU SIRISH; HENRI, JON; ZHANG, PENGYI; MOHIMI, ELHAM; JARIWALA, BHAVIN; MAHOROWALA, ARPAN PRAVIN
To: LAM RESEARCH CORPORATION
Reel/Frame 057028/0219 →
Continuity (3)
Continuation 16744022 · Jan 15, 2020
Continuation 15972918 · May 7, 2018
Related Publication 20210358753A1 · Nov 18, 2021