Electronic display with hybrid in-pixel and external compensation
A display pixel is provided that is operable to support hybrid compensation scheme having both in-pixel threshold voltage canceling and external threshold voltage compensation. The display may include multiple p-type silicon transistors with at least one n-type semiconducting-oxide transistor and one storage capacitor. An on-bias stress phase may be performed prior to a threshold voltage sampling and data programming phase to mitigate hysteresis and improve first frame response. In low refresh rate displays, a first additional on-bias stress operation can be performed separate from the threshold voltage sampling and data programming phase during a refresh frame and a second additional on-bias stress operation can be performed during a vertical blanking frame. The display pixel may be configured to receive an initialization voltage and an anode reset voltage, either of which can be dynamically tuned to match the stress of the first and second additional on-bias stress operations to minimize flicker.
1. A method of operating a display pixel having a light-emitting diode, a drive transistor, at least one emission transistor, and an anode reset transistor coupled to an anode of the light-emitting diode, the method comprising:
during a refresh period, deactivating the at least one emission transistor and setting an anode reset voltage for the anode reset transistor to a first voltage level;
during an emission period after the refresh period, activating the at least one emission transistor; and
during a blanking period after the emission period, deactivating the at least one emission transistor and pulsing the anode reset voltage at least once to a second voltage level different than the first voltage level. period.
2. The method of claim 1 , further comprising:
pulsing the anode reset voltage at least twice during the blanking period.
3. The method of claim 1 , wherein the display pixel further includes a data loading transistor configured to receive a data line voltage, the method further comprising:
during the blanking period, reducing power consumption of the display pixel by setting the data line voltage to a predetermined voltage level.
4. The method of claim 1 , wherein the display pixel further includes a data loading transistor and a bias transistor that is configured to receive a bias voltage, the method further comprising:
during the refresh period, activating the data loading transistor; and
temporarily activating the bias transistor before activating the data loading transistor during the refresh period.
5. The method of claim 4 , further comprising:
temporarily activating the bias transistor after activating the data loading transistor during the refresh period.
6. The method of claim 4 , wherein the display pixel further includes an initialization transistor configured to receive an initialization voltage, the method further comprising:
temporarily activating the initialization transistor after activating the bias transistor and before activating the data loading transistor.
7. The method of claim 4 , further comprising:
activating the bias transistor at least once during the blanking period.
8. The method of claim 4 , further comprising:
activating the bias transistor at least twice during the blanking period.
9. The method of claim 4 , further comprising:
setting the bias voltage to a third voltage level during the refresh period; and
setting the bias voltage to a fourth voltage level different than the third voltage level during the blanking period.
10. A method of operating a display pixel having a light-emitting diode, a drive transistor, at least one emission transistor, and a bias transistor directly coupled to the drive transistor and configured to receive a bias voltage, the method comprising:
during a refresh period, deactivating the at least one emission transistor and activating the bias transistor at least once;
during an emission period after the refresh period, activating the at least one emission transistor; and
during a blanking period after the emission period, deactivating the at least one emission transistor and activating the bias transistor at least once.
11. The method of claim 10 , further comprising:
activating the bias transistor at least twice during the refresh period.
12. The method of claim 11 , further comprising:
activating the bias transistor at least twice during the blanking period.
13. The method of claim 10 , further comprising:
activating the bias transistor a given number of times during the refresh period; and
activating the bias transistor the given number of times during the blanking period.
14. The method of claim 10 , further comprising:
setting the bias voltage to a first voltage level during the refresh period; and
setting the bias voltage to a second voltage level different than the first voltage level during the blanking period.
15. The method of claim 10 , wherein the display pixel further includes an anode reset transistor coupled to an anode of the light-emitting diode and includes an initialization transistor coupled to a gate terminal of the drive transistor, the method further comprising:
setting an anode reset voltage that is provided to the anode reset transistor to a fixed voltage level during the refresh period; and
adjusting the anode reset voltage from the fixed voltage level to a different voltage level during the blanking period.
16. A method of operating a display pixel having a light-emitting diode, a drive transistor, at least one emission transistor, a data loading transistor, an anode reset transistor coupled to an anode of the light-emitting diode, and a bias transistor configured to receive a bias voltage, the method comprising:
during a refresh period, deactivating the at least one emission transistor and simultaneously activating the anode reset transistor and the bias transistor;
during an emission period after the refresh period, activating the at least one emission transistor; and
during a blanking period after the emission period, deactivating the at least one emission transistor and simultaneously activating the anode reset transistor and the bias transistor.
17. The method of claim 16 , further comprising:
setting an anode reset voltage that is provided to the anode reset transistor to a fixed voltage level during the refresh period; and
adjusting the anode reset voltage from the fixed voltage level to a different voltage level during the blanking period.
18. The method of claim 16 , further comprising:
setting the bias voltage to a first voltage level during the refresh period; and
setting the bias voltage to a second voltage level different than the first voltage level during the blanking period.
19. The method of claim 16 , further comprising:
providing a first scan line signal to a semiconducting-oxide transistor coupled to a gate terminal of the drive transistor;
providing a second scan line signal to the data loading transistor; and
providing a third scan line signal to the anode reset transistor and the bias transistor.